Essays about: "FPGA matlab simulink"

Showing result 1 - 5 of 9 essays containing the words FPGA matlab simulink.

  1. 1. Evaluation of high-level synthesis tools for generation of Verilog code from MATLAB based environments

    University essay from Luleå tekniska universitet/Institutionen för system- och rymdteknik

    Author : Carl Bäck; [2020]
    Keywords : HLS; System Generator for DSP; Histogram; Xilinx Zynq UltraScale ; FPGA design workflow; Hardware Description Language Coder; HDL Coder; Field Programmable Gate Arrays; Image processing;

    Abstract : FPGAs are of interest in the signal processing domain as they provide the opportunity to run algorithms at very high speed. One possible use case is to sort incoming data in a measurement system, using e.g. a histogram method. READ MORE

  2. 2. Performance Evaluation of MathWorks HDL Coder as a Vendor Independent DFE Generation

    University essay from Lunds universitet/Institutionen för elektro- och informationsteknik

    Author : Elisabeth Pongratz; Roshan Cherian John; [2019]
    Keywords : MATLAB; Simulink; HDL Coder; XSG; DSPB; Technology and Engineering;

    Abstract : This thesis aims to evaluate MathWorks HDL (Hardware Descriptive Language) Coder and compare the results with designs produced by its vendor dependent counterparts. The focus is mainly on evaluate the design effort needed to close timing and to get optimal resource mapping for a selected design. READ MORE

  3. 3. PFC-design for frequency converter

    University essay from Linköpings universitet/Fysik och elektroteknik; Linköpings universitet/Tekniska högskolan

    Author : David Kantzon; [2015]
    Keywords : ;

    Abstract : This thesis deals with power factor correction for three-phase systems. A boost-buck topology was described, modeled and then simulated in MATLAB/Simulink. The simulation results show that the system provides a power factor over 99% over the tested power output range. READ MORE

  4. 4. High Level Synthesis of FPGA-Based Digital Filters

    University essay from Uppsala universitet/Institutionen för informationsteknologi

    Author : Gerald Baguma; [2014]
    Keywords : ;

    Abstract : This thesis work is aimed at the high level synthesis of FPGA based IIR digital filters using Vivado HLS produced by Xilinx and HDL coder produced by MathWorks. The Higher Layer Model of the filter was designed in Vivado HLS, MATLAB and Simulink. Simulations, verification and Synthesis of the RTL code was done for both tools. READ MORE

  5. 5. Hardware-in-The-Loop Simulation of a High Speed Servo System

    University essay from KTH/Maskinkonstruktion (Inst.)

    Author : Eiður Ágústsson; [2013]
    Keywords : ;

    Abstract : In production industries there is a constant demand for shorter time to market and lower development costs. Using models and simulations has been shown to decrease development time and increase product quality. One reason for this is that these methods allow development and testing of control systems before actual prototypes are available. READ MORE