Essays about: "Folded-Cascode"
Found 5 essays containing the word Folded-Cascode.
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1. Power-Efficient Settling Time Reduction Techniques for a Folded-Cascode Amplifier in 1.8 V, 0.18 um CMOS
University essay from Linköpings universitet/Elektroniska Kretsar och System; Linköpings universitet/Tekniska fakultetenAbstract : Testability is crucial in today’s complex industrial system on chips (SoCs), where sensitive on-chip analog voltages need to be measured. In such cases, an operational amplifier (opamp) is required to sufficiently buffer the signals before they can drive the chip pad and probe parasitics. READ MORE
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2. Design of a Low Power Cyclic/Algorithmic Analog-to-Digital Converter in a 130nm CMOS Process
University essay from Elektroniksystem; Tekniska högskolanAbstract : Analog-to-digital converters are inevitable in the modern communication systems and there is always a need for the design of low-power converters. There are different A/D architectures to achieve medium resolution at medium speeds and among all those Cyclic/Algorithmic structure stands out due to its low hardware complexity and less die area costs. READ MORE
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3. High-Speed Hybrid Current mode Sigma-Delta Modulator
University essay from Elektroniksystem; Tekniska högskolanAbstract : The majority of signals, that need to be processed, are analog, which are continuous and can take an infinite number of values at any time instant. Precision of the analog signals are limited due to influence of distortion which leads to the use of digital signals for better performance and cost. READ MORE
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4. On the Design of an Analog Front-End for an X-Ray Detector
University essay from Institutionen för systemteknikAbstract : Rapid development in CMOS technology has resulted in its suitability for the implementation of readout front-end systems in terms of high integration density, and low power consumption yet at the same time posing many challenges for analog circuits design like readout front-end. One of the significant challenges is the low noise design for high speed front-end systems, while at the same time minimizing the power consumption as much as possible. READ MORE
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5. Design of a Low Power, High Performance Track-and-Hold Circuit in a 0.18µm CMOS Technology
University essay from Institutionen för systemteknikAbstract : This master thesis describes the design of a track-and-hold (T&H) circuit with 10bit resolution, 80MS/s and 30MHz bandwidth. It is designed in a 0.18µm CMOS process with a supply voltage of 1.8 Volt. READ MORE
