Essays about: "HLS"
Showing result 1 - 5 of 29 essays containing the word HLS.
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1. Optimizing on-chip Machine Learning for Data Prefetching
University essay from Göteborgs universitet/Institutionen för data- och informationsteknikAbstract : The idea behind data prefetching is to speed up program execution by predicting what data is needed by the processor, before it is actually needed. Data prefetching is commonly performed by prefetching the next memory address in line, but there are other, more sophisticated approaches such as machine learning. READ MORE
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2. Deep Learning Model Deployment for Spaceborne Reconfigurable Hardware : A flexible acceleration approach
University essay from KTH/Skolan för elektroteknik och datavetenskap (EECS)Abstract : Space debris and space situational awareness (SSA) have become growing concerns for national security and the sustainability of space operations, where timely detection and tracking of space objects is critical in preventing collision events. Traditional computer-vision algorithms have been used extensively to solve detection and tracking problems in flight, but recently deep learning approaches have seen widespread adoption in non-space related applications for their high accuracy. READ MORE
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3. Novel Method of ASIC interface IP development using HLS
University essay from Lunds universitet/Institutionen för elektro- och informationsteknikAbstract : High-Level Synthesis(HLS) is a design methodology that enables designers to implement hardware from high-level coding languages, such as C, C++, or System C. It provides designers with the ability to convey their design at a higher level of abstraction, which allows more emphasis on an algorithm and functional aspects of design instead on low-level hardware details. READ MORE
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4. High Level Synthesis for ASIC and FPGA
University essay from Lunds universitet/Institutionen för elektro- och informationsteknikAbstract : This thesis aims to evaluate the performance of Siemens’ High Level Synthesis (HLS) tool Catapult. HLS can be considered the next step up in abstraction level from writing traditional Register Transfer Level (RTL) code which is time consuming and error prone. READ MORE
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5. Using HLS for Acceleration of FPGA Development: A 3780-Point FFT Case Study
University essay from Linköpings universitet/Datorteknik; Linköpings universitet/Tekniska fakultetenAbstract : Manually designing hardware for fpga implementations is time consuming. Onepossible way to accelerate the development of hardware is to use high level syn-thesis (hls) tools. Such tools synthesizes a high level model written in a languagesuch as c++ into hardware. READ MORE