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Showing result 1 - 5 of 20 essays matching the above criteria.

  1. 1. A General Purpose Near Data Processing Architecture Optimized for Data-intensive Applications

    University essay from Lunds universitet/Institutionen för elektro- och informationsteknik

    Author : Xingda Li; Haidi Hu; [2023]
    Keywords : Technology and Engineering;

    Abstract : In recent years, as Internet of Things (IoT) and machine learning technologies have advanced, there has been increasing interest in the study of energy-efficient and flexible architectures for embedded systems. To bridge the performance gap between microprocessors and memory systems, Near-Data Processing (NDP) was introduced. READ MORE

  2. 2. AXI-PACK : Near-memory Bus Packing for Bandwidth-Efficient Irregular Workloads

    University essay from KTH/Skolan för elektroteknik och datavetenskap (EECS)

    Author : Chi Zhang; [2022]
    Keywords : General propose processor; on-chip bus protocol; irregular memory access; ASIC digital circuit design.; Generellt förslag på processor; on-chip-bussprotokoll; oregelbunden minnesåtkomst; digital ASIC-kretsdesign.;

    Abstract : General propose processor (GPP) are demanded high performance in dataintensive applications, such as deep learning, high performance computation (HPC), where algorithm kernels like GEMM (general matrix-matrix multiply) and SPMV (sparse matrix-vector multiply) kernels are intensively used. The performance of these data-intensive applications are bounded with memory bandwidth, which is limited by computing & memory access coupling and memory wall effect. READ MORE

  3. 3. Configurable, scalable single-ended sense amplifier with additional auxiliary blocks for low-power two-port memories in advanced FinFET technologies

    University essay from Lunds universitet/Institutionen för elektro- och informationsteknik

    Author : Limitha Subbaiah Kumar Nangaru; [2022]
    Keywords : CMOS Complementary Metal Oxide Semiconductors ; DRC Design Rule Check ; Process Corners; FinFET Fin Field Effect Transistor ; IC Integrated Circuit ; LVS Layout Versus Schematic ; Monte Carlo; Nominal Voltage; PDK Process Design Kit ; Power Delay Product; Read Bit Line; Read Word Line; SoC System on Chip ; SRAM Static Random Access Memory ; Threshold Voltage; Technology and Engineering;

    Abstract : System on Chip (SoC) designs contain a variety of Intellectual Property (IP) cores, including digital signal processing blocks, media and graphics processing units, as well as processing core units that employ multiple-port memories to enhance performance and bandwidth. These memories allow parallel read/write operations from the same memory blocks from different ports. READ MORE

  4. 4. A Study on Efficient Memory Utilization in Machine Learning and Memory Intensive Systems

    University essay from Lunds universitet/Institutionen för elektro- och informationsteknik

    Author : Jones Emmanuel; [2021]
    Keywords : Memory; Machine Learning; Hardware accelerator; Power; PULPissimo; Technology and Engineering;

    Abstract : As neural networks find more and more practical applications targeted for edge devices, the implementation of energy-efficient architectures is becoming very crucial. Despite the advancements in process technology, power and performance of memories remain to be a bottleneck for most computing platforms. READ MORE

  5. 5. Methodology For Improving performance & Reliability In Low Voltage on-chip Memories

    University essay from Lunds universitet/Institutionen för elektro- och informationsteknik

    Author : Hamed Movahedimeimandi; [2019]
    Keywords : Low power memories; Assist technique; Voltage Boosting; Charge pump; Sense amplifier; Voting method.; Technology and Engineering;

    Abstract : Recent surveys show that on average about 70% of the area budget of the system on chip (SoC) is occupied by Static Random Access Memory (SRAM)s, with a capacity ranging from a few kilo-bits to tens of megabits. SRAM (static RAM or SRAM) is a type of electronic memory that uses bistable latching circuitry (flip-flop) to store each bit. READ MORE