Essays about: "VHDL Code Implementation code"

Showing result 1 - 5 of 14 essays containing the words VHDL Code Implementation code.

  1. 1. Difference Between Memory-based Storage and Register-based Storage on FPGAs

    University essay from Linköpings universitet/Institutionen för systemteknik

    Author : Yiqian Cui; [2023]
    Keywords : ;

    Abstract : Memory-based storage and register-based storage are commonly used storagetypes in fpgas. This thesis aims to build up the architecture of memory-basedstorage and register-based storage, implement the corresponding methods, compare the difference between them and determine which kind of storage workswell under different circumstances. READ MORE

  2. 2. Code Synthesis for Heterogeneous Platforms

    University essay from KTH/Skolan för elektroteknik och datavetenskap (EECS)

    Author : Zhouxiang Fu; [2023]
    Keywords : Code Synthesis; Heterogeneous Platform; Zero-Overhead Topology Infrastructure; Kodsyntes; Heterogen plattform; Zero-Overhead Topologi Infrastruktur;

    Abstract : Heterogeneous platforms, systems with both general-purpose processors and task-specific hardware, are largely used in industry to increase efficiency, but the heterogeneity also increases the difficulty of design and verification. We often need to wait for the completion of all the modules to know whether the functionality of the design is correct or not, which can cause costly and tedious design iteration cycles. READ MORE

  3. 3. High Level Synthesis for ASIC and FPGA

    University essay from Lunds universitet/Institutionen för elektro- och informationsteknik

    Author : Malin Heyden; [2023]
    Keywords : HLS; high level synthesis; asic; fpga; catapult; filter; sfir; Technology and Engineering;

    Abstract : This thesis aims to evaluate the performance of Siemens’ High Level Synthesis (HLS) tool Catapult. HLS can be considered the next step up in abstraction level from writing traditional Register Transfer Level (RTL) code which is time consuming and error prone. READ MORE

  4. 4. A Digital Design Flow - From Concept to RTL Description, Using Mathworks and Cadence's Tools

    University essay from Lunds universitet/Institutionen för elektro- och informationsteknik

    Author : Tor Hammarbäck; Jorge Deza Concori; [2022]
    Keywords : Technology and Engineering;

    Abstract : This report presents our digital design flow for creating high speed very large scale integration circuits using a fifth generation disruptive beamforming control and data processing circuit as example. The flow consists of different stages. READ MORE

  5. 5. FPGA Implementation of the ORB Algorithm

    University essay from Lunds universitet/Institutionen för elektro- och informationsteknik

    Author : Xinyuan Zhang; Emil Sturk Sellstedt; [2022]
    Keywords : Technology and Engineering;

    Abstract : Image feature extraction has become a key technology in the field of autonomous Artificial Intelligence. The algorithm Oriented FAST and Rotated BRIEF (ORB), uses established technologies in image processing to allow a computer to ”see” and navigate its surroundings. READ MORE