Essays about: "cadence virtuoso"

Showing result 1 - 5 of 15 essays containing the words cadence virtuoso.

1. 1. Cryo-CMOS ICs for Scalable Superconducting Nanowire Single Photon Detectors

   University essay from KTH/Skolan för elektroteknik och datavetenskap (EECS)

   Author : Tereza Viskova; [2022]
   Keywords : Superconducting nanowire single photon detector; Quantum; Photonic; Readout; Cadence Virtuoso; Cryogenic; Digital; Supraledande nanotrådsdetektorer; Avläsning; Cadence Virtuoso; Kryogen; Digital;

   Abstract : Superconducting nanowire single-photon detectors are the most promising technology in quantum photon information. They offer high speed, high detection efficiency, low dark count rate as well as low timing jitter compared to other single photon detection solutions. READ MORE

3. 2. Design and Verification of An Energy-Efficient Edge-Pursuit Comparator

   University essay from KTH/Skolan för elektroteknik och datavetenskap (EECS)

   Author : Haiqin Xie; [2022]
   Keywords : analog to digital converter ADC ; SAR; comparator; edge-pursuit comparator EPC ; edge-pursuit comparator enhanced with capacitor EPCC ; energyefficient.; analog till digital omvandlare ADC ; SAR; komparator; edge-pursuit komparator EPC ; edge-pursuit komparator förbättrad med kondensator EPCC ; energieffektiv.;

   Abstract : With the rapid development of mobile communication, sensors, and biomedical in recent years, the demand for accurate data information, highquality audio and image has become much more significant, which requires a high-precision Analog to Digital Converter (ADC) to process weak analog signals. As one of the core modules of ADC, the comparator’s precision, speed, stability, and noise play a key role in the performance of the whole circuit. READ MORE

4. 3. A design of a 100 MS/s, 8-bit Pipelined ADC in CMOS

   University essay from Lunds universitet/Institutionen för elektro- och informationsteknik

   Author : Shen Zhang; [2021]
   Keywords : Technology and Engineering;

   Abstract : The thesis focuses on designing and simulating an 8-bit high-speed fully differential pipelined Analog to Digital Converter (ADC) in the 65nm Complementary Metal-Oxide-Semiconductor (CMOS) technology by using the software Cadence Virtuoso. The aim is to increase the operation speed of the ADC for communication systems without reducing the performance, in the meantime, the low power consumption and the low complexity should also be required when considering future implementation. READ MORE

5. 4. PLL for 5G mmWave

   University essay from Lunds universitet/Institutionen för elektro- och informationsteknik

   Author : Daniel Bakic; Jinzhuo Wu; [2020]
   Keywords : PLL; 5G-NR; RFIC; beamforming; 22nm FDSOI; charge pump; vco; loop filter; frequency divider; phase detector; phase noise; jitter; Technology and Engineering;

   Abstract : This paper presents research and implementation of a high frequency Integer-N phase-locked loop for digital beamforming in mobile devices. Multiple topologies investigated whereof two were implemented. The transient phase noise of the PLL is -104dB/-95dB @1MHz. The output frequency range is from 8G-10G. READ MORE

6. 5. Design of a power amplifier for NB-IoT

   University essay from Lunds universitet/Institutionen för elektro- och informationsteknik

   Author : Rajeshwari Yogi; [2018]
   Keywords : NB-IoT; Power amplifier; Inverse class D power amplifer; Technology and Engineering;

   Abstract : An inverse class D power amplifier and a class A power amplifier are designed at schematic level for 20 dBm power class and NB-IoT specification in 65 nm CMOS technology. A suitable switch mode supply modulator is also designed. READ MORE