Essays about: "instruction level optimizing"

Showing result 1 - 5 of 6 essays containing the words instruction level optimizing.

  1. 1. Optimizing the instruction scheduler of high-level synthesis tool

    University essay from KTH/Skolan för elektroteknik och datavetenskap (EECS)

    Author : Zihao Xu; [2023]
    Keywords : Instruction scheduling; Scheduling algorithm; CGRA; High-level Sythnesis; SiLago; Algorithm-level Synthesis; Constraint programming; Instruktion schemaläggning; schemaläggning algoritm; CGRA; High-level Sythnesis; SiLago; Algoritm-nivå Synthesis; Constraint programmering;

    Abstract : With the increasing complexity of the chip architecture design for meeting different application requirements, the corresponding instruction scheduler of high-level synthesis tool needs to solve complex scheduling problems. Dynamically Reconfigurable Resource Array (DRRA) is a novel architecture based on Coarse-Grained Reconfigurable Architecture (CGRA) on SiLago platform, the instruction scheduler of Vesyla-II, the dedicated High-Level Synthesis (HLS) tool targets for DRRA needs to schedule the specific instruction sets designed for Distributed Two-level Control System (D2LC). READ MORE

  2. 2. Enhancing Learning Outcomes with Pure Question-Based Learning : A Study on the Effectiveness of the Method in a Primary School Environment

    University essay from KTH/Skolan för elektroteknik och datavetenskap (EECS)

    Author : Dominik Andraszek; [2023]
    Keywords : Human–Computer Interaction; Pure Question-Based Learning; Active Learning; Formative Feedback; Technology-Enhanced Learning; Primary School;

    Abstract : In light of technological progress, companies, and public entities must remain aware of the significant opportunities presented by new technologies in terms of accelerating and optimizing knowledge acquisition. This research paper investigates the impact of pure question-based learning (pQBL) on academic performance in a primary school environment. READ MORE

  3. 3. The Global Interconnection Scheme of Silago : RTL Design and Verification

    University essay from KTH/Skolan för elektroteknik och datavetenskap (EECS)

    Author : Tong Lou; [2023]
    Keywords : Silago; global interconnection; synchronous dataflow; network on chip; Silago; global sammankoppling; synkront dataflöde; nätverk på chip;

    Abstract : The Silago concept introduces a hardware-centric platform that is based on coarse-grained reconfigurable fabrics and networks on chips(NoCs). With the intra-region and inter-region NoC, the Silago platform can form resource clusters to host various applications. READ MORE

  4. 4. Random Testing of Code Generation in Compilers

    University essay from KTH/Skolan för informations- och kommunikationsteknik (ICT)

    Author : Bevin Hansson; [2015]
    Keywords : ;

    Abstract : Compilers are a necessary tool for all software development. As modern compilers are large and complex systems, ensuring that the code they produce is accurate and correct is a vital but arduous task. Correctness of the code generation stage is important. READ MORE

  5. 5. Optimizing an H.264 video encoder for real-time HD-video encoding

    University essay from KTH/Skolan för informations- och kommunikationsteknik (ICT)

    Author : Per Hermansson; [2011]
    Keywords : ;

    Abstract : With the increased demands for higher resolution and higher quality video the requirements for larger storage medium and higher bandwidth has increased as well. One method to cope with these new demands is by introducing new ways to efficiently compress video. READ MORE