Receiver Front-end Design for WiMAX/LTE in 90 nm CMOS

Abstract: The development of wireless communication systems into multi-standard radio architectures that can process a multitude of frequency bands and modulation schemes has lead to a growing demand for wideband receiver front-ends. To allow for portability and low cost, these new architectures also need to be low power, compact size integrated circuits with a higher degree of components integrated on chip. These requirements have made the simple architecture of the Zero IF receiver especially attractive for this application. The design of a Zero IF receiver that complies both with current standards such as GSM and UMTS as well as the new standards WiMAX and LTE meet several challenges. Both the new standards take advantage of the multi carrier modulation scheme OFDM to increase spectral efficiency, which demands for higher linearity because of a non constant signal envelope. Also the frequency spectrum allocated for WiMAX/ LTE range from 900MHz to 5.8GHz which is several GHz higher than current multi-standard receivers. One possible solution for a high linearity wideband Zero IF receiver is to use the recently developed common gate LNA with capacitive cross-coupling technique, together with a passive down-conversion mixer that has inherently high linearity. In this work an inductorless wideband zero IF receiver front-end is designed. System level budget analysis is performed for the targeted standards WiMAX/LTE to extract noise figure, gain and linearity requirements for the design of the LNA and down-conversion mixer. The WiMAX/LTE receiver front-end is designed using 1.2V 90nm CMOS and consumes 7mW. The receiver front-end provides a gain of 25 dB covering a bandwidth of 4.5 GHz with a noise figure below 5 dB and midband IIP3 of -20 dBm. The layout of the front-end occupies a total chip area of 0.06 mm2.