A JPEG Encoder in SystemC
Abstract: This thesis evaluates how SystemC, an open source system level modeling
language, may improve system design. A gap exists in current design
workflow, which causes an unnatural interrupt between high-level and low-
level modeling. A common ground for software and hardware development is
also absent in present design methodologies, which decreases the chances
for successful co-operation between project members.
As a part of this investigation, a JPEG encoder has been modeled in
SystemC. A software prototype of the JPEG encoder has later been
implemented on an ARM Integrator platform. Based on these experiences, a
proposal for a complete system design flow, incorporating SystemC, has been
made. The design flow spans from Algorithmic level down to Register
Transfer Level. The essence of the design flow is SystemC in conjunction
with Transaction Level Modeling, which not only provides solutions to
overcome the limitations of traditional design, but also introduces new
possibilities.
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