Evaluation of hardware and firmware for a Data Readout system of the PANDA Electro-Magnetic Calorimeter

University essay from Uppsala universitet/Institutionen för informationsteknologi

Author: Ehsan Noorzaei; [2023]

Keywords: ;

Abstract: PANDA is the next generation hadron physics detector under construction at the Facility for Antiproton and Ion Research (FAIR) in Darmstadt, Germany to accurately detect and parameterize events with kinetic energies from 1MeV to 8GeV. PANDA is a 4π detector and due to its unique shape, all the readout electronics from ADC modules, power supplies, and a controller unit is housed in liquid-cooled crates mounted inside the detector. Therefore, the readout electronics are exposed to a strong magnetic field and radiation.   This thesis work is focused on selected topics of a data readout system under development hardware power supply modules and evaluation of firmware for control and data acquisition. The thesis is divided into four sections power supply, power supply monitoring, remote configuration and debugging, and PANDA data concentrator. Each of these sections has its own set of goals that need to be accomplished.   The primary goal of the power supply section is to design a power supply for high radiation environments. Low heat profile, low noise and ripple, and high efficiency are desirable power supply characteristics. There is also a space constraint that must be considered.   The main goal of section two (power supply monitoring) is monitoring of all power supply channels. A controller board is in charge of achieving this goal. The Controller board has two 24 bits ADCs (MAX11410) and each ADC has 10 channels.   The remote configuration and debugging section provides a technique for configuring and debugging FPGAs through an optical link. PolarFire and Xilinx FPGAs are employed to transmit and receive JTAG programmer signals throughout a gigabit optical link.   A PANDA data concentrator final prototype has been completed and is now ready for testing and firmware development. The aim of final section is about the development of firmware for running and testing 74 optical links.   

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