Stepwise Pad Driver in Deep-Submicron Technology

Abstract: In this report, we investigate the changes needed to implement aprevious design of an energy efficient pad driver in a more modern 130nm CMOS process, driving a load of 5 pF. A modified design procedureis presented and applied to a test case, resulting in a working driver.Simulations indicated energy savings of up to 50 percent compared tothe traditional implementation of a pad driver, at switching times aslow as 1.2 ns.