Implementation and evaluation of selected Machine Learning algorithms on a resource constrained telecom hardware platform

Abstract: The vast majority of computing hardware platforms available today are not desktop PCs. They are embedded systems, sensors and small specialized pieces of hardware present in almost every digital product available today. Due to the massive amount of information available through these devices we can find new and exciting ways to apply and benefit from machine learning. Many of these computing devices have specialized, resource-constrained architectures and it might be problematic to perform complicated computations. If such a system is under heavy load or has restricted performance, computational power is a valuable resource and costly algorithms must be avoided. \\This master thesis will present an in-depth study investigating the trade-offs between precision, latency and memory consumption of a selected set of machine learning algorithms implemented on a resource constrained multi-core telecom hardware platform. This report includes motivations for the selected algorithms, discusses the results of the algorithms execution on the hardware platform and offers conclusions relevant to further developments.