Design and Implementation of a Direct Digital Frequency Synthesizer using Sum of Weighted Bit Products

Abstract: Direct Digital Frequency Synthesis (DDFS) is a method of producing an analog waveform by generating a time-varying signal in digital form, succeeded by digital-to-analog reconstruction. At behavioral level the bit products with specified weights are used to generate the sine wave. In representation of a sine wave both positive and negative weights are generated. Since negative weights are not desired in design, the negative weights are transformed to positive weights. To reduce the number of current sources and control signals, bit product signals of those current sources which cannot be switched on simultaneously and have equal weights are shared. After sharing weights, the control signals are reduced to from 59 to 43 and current sources from 207 to 145. Different control words are used by the DDFS system in order to generate different frequencies. The control word is successively added to the previous value in a 20-bit accumulator. Nine most significant bits out of these twenty bits are used for the DAC. Since the Current Steering DAC architecture is suitable for high speed and high resolution purposes, so a 9-bit nonlinear current steering DAC is used to convert the output of bit products to the analog sine wave. Seven bits are used to generate one quarter of the sine wave. Eighth and ninth bits are used to generate the full sine wave. HCMOS 9 (130 nm) ST Microelectronics process is used by employing high speed NMOS and PMOS transistors. The bit products (control signals) are computed by using complementary static CMOS logic which then act as control signals for the current sources after passing through D-flip flops. Practical design issues of current sources and parts of digital logic were studied and implemented using the Cadence full-custom design environment.