Essays about: "Clock divider"
Found 5 essays containing the words Clock divider.
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1. Low Cost Embedded Accurate 6 GHz RF Frequency Counter
University essay from Lunds universitet/Institutionen för elektro- och informationsteknikAbstract : Speed, portability and quality. These are all attributes that manufacturers are striving to achieve. The demand for speed is making wireless frequencies increase with a steady pace. The demand for portability is filling the world with high speed wireless devices that are expecting their data fast and without errors. READ MORE
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2. Design and Simulation of Miscellaneous Blocks of an All-Digital PLL for the 60 GHz Band
University essay from Elektroniksystem; Tekniska högskolanAbstract : A phase-locked loop commonly known as PLL is widely used in communication systems. A PLL is used in radio, telecommunications, modulation and demodulation. It can be used for clock generation, clock recovery from data signals, clock distribution and as a frequency synthesizer. Most electronic circuits encounter the problem of the clock skew. READ MORE
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3. An On-Chip Memory for Testing of High-Speed Mixed-Signal Circuits
University essay from Elektroniska komponenter; Tekniska högskolanAbstract : Mixed-signal processing systems especially data converters can be reliably tested at high frequencies using on-chip testing schemes based on memory. In this thesis, an on-chip testing strategy based on shift registers/memory (2 k bits) has been proposed for digital-to-analog converters (DACs) operating at 5 GHz. READ MORE
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4. Oscillators with Constant Frequency over PVT
University essay from KTH/Skolan för informations- och kommunikationsteknik (ICT)Abstract : This thesis is offered by Texas Instruments, Germany, aimed at designing an on-chip oscillator with constant frequency over process, voltage and temperature variation. RC relaxation oscillator is chosen to be the solution due to its small area and proper frequency accuracy. READ MORE
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5. High Speed On-Chip Measurment Circuit
University essay from Institutionen för systemteknikAbstract : This master thesis describes a design exploration of a circuit capable of measuring high speed signals without adding significant capacitive load to the measuring node. It is designed in a 0.13 CMOS process with a supply voltage of 1.2 Volt. READ MORE
