Essays about: "DPU"

Found 4 essays containing the word DPU.

  1. 1. Implementation of Bolt Detection and Visual-Inertial Localization Algorithm for Tightening Tool on SoC FPGA

    University essay from KTH/Skolan för elektroteknik och datavetenskap (EECS)

    Author : Muhammad Ihsan Al Hafiz; [2023]
    Keywords : Bolt detection; Visual-Inertial localization; System-on-Chip SoC ; Field-Programmable Gate Array FPGA ; Machine learning; Perspective-n-Points; Error-State Extended Kalman Filter ESEKF ; High-Level Synthesis HLS ; YOLO; Tightening tool; Bultdetektering; visuell-tröghetslokalisering; System-on-Chip SoC ; Field-Programmable Gate Array FPGA ; Machine Learning; Perspective-n-Points; Error-State Extended Kalman Filter ESEKF ; High-Level Synthesis HLS ; YOLO; åtdragningsverktyg;

    Abstract : With the emergence of Industry 4.0, there is a pronounced emphasis on the necessity for enhanced flexibility in assembly processes. In the domain of bolt-tightening, this transition is evident. Tools are now required to navigate a variety of bolts and unpredictable tightening methodologies. READ MORE

  3. 2. Mapping quantized convolutional layers on the SiLago platform

    University essay from KTH/Skolan för elektroteknik och datavetenskap (EECS)

    Author : Yue Zhang; [2022]
    Keywords : SiLago; algorithm mapping; quantized neural networks; convolution; SiLago; algoritmkartläggning; kvantiserade neurala nätverk; faltning;

    Abstract : Convolutional neural networks (CNNs) have been utilized in various applications, such as image classification, computer vision, etc. With development, the complexity and computation of CNNs also increase, which requires more memory and resources when deployed on devices, especially embedded systems. READ MORE

  4. 3. Multipath transport protocol offloading

    University essay from Karlstads universitet/Institutionen för matematik och datavetenskap (from 2013); Karlstads universitet/Avdelningen för datavetenskap

    Author : Rebecka Alfredsson; [2022]
    Keywords : QUIC; multipath; hardware offloading; DPDK; crypto; DPU;

    Abstract : Recently, we have seen an evolution of programmable network devices, where it is possible to customize packet processing inside the data plane at an unprecedented level. This is in contrast to traditional approaches, where networking device functionality is fixed and defined by the ASIC and customers need to wait possibly years before the vendors release new versions that add features required by customers. READ MORE

  5. 4. An Improved Hierarchical Design Flow for Coarse Grain Regular Fabrics

    University essay from KTH/Skolan för informations- och kommunikationsteknik (ICT)

    Author : Nasim Farahini; [2011]
    Keywords : ;

    Abstract : This project included two parts. First, a reconfigurable cell was designed as the DataPath Unit (DPU) of a Dynamically Reconfigurable Resource Array (DRRA). In this cell, hardware resources were shared to be reused in different configurations. Consequently, the area was reduced by 68% in comparison with the previous DPU with the same functionality. READ MORE