Essays about: "Hardware Accelerator"

Showing result 1 - 5 of 63 essays containing the words Hardware Accelerator.

  1. 1. Code Synthesis for Heterogeneous Platforms

    University essay from KTH/Skolan för elektroteknik och datavetenskap (EECS)

    Author : Zhouxiang Fu; [2023]
    Keywords : Code Synthesis; Heterogeneous Platform; Zero-Overhead Topology Infrastructure; Kodsyntes; Heterogen plattform; Zero-Overhead Topologi Infrastruktur;

    Abstract : Heterogeneous platforms, systems with both general-purpose processors and task-specific hardware, are largely used in industry to increase efficiency, but the heterogeneity also increases the difficulty of design and verification. We often need to wait for the completion of all the modules to know whether the functionality of the design is correct or not, which can cause costly and tedious design iteration cycles. READ MORE

  3. 2. Hardware Accelerator of Bundle Adjustment Algorithm

    University essay from Lunds universitet/Institutionen för elektro- och informationsteknik

    Author : Yichen Wang; Yuzhe Zhang; [2023]
    Keywords : Technology and Engineering;

    Abstract : With the popularization and development of CV technology, the SLAM algorithm is widely used in scenarios such as self-driving cars and autonomous navigation robots. As a key step in the SLAM system, the BA algorithm is responsible for optimizing camera parameters and 3D point coordinates. READ MORE

  4. 3. A Study on Fault Tolerance of Object Detector Implemented on FPGA

    University essay from KTH/Skolan för elektroteknik och datavetenskap (EECS)

    Author : Tiancheng Yang; [2023]
    Keywords : Object detection; YOLO-v3-tiny; Fault tolerance; FPGA; VHDL; Hardware accelerator; Triple-modular redundancy; Time redundancy; Stuck-at-faults;

    Abstract : Objektdetektering har fått stort forskningsintresse de senaste åren, eftersom det är maskiners ögon och är en grundläggande uppgift inom datorseende som syftar till att identifiera och lokalisera föremål av intresse. Hårdvaruacceleratorer syftar vanligtvis till att öka genomströmningen för realtidskrav samtidigt som energiförbrukningen sänks. READ MORE

  5. 4. FPGA accelerated packet capture with eBPF : Performance considerations of using SoC FPGA accelerators for packet capturing.

    University essay from KTH/Skolan för elektroteknik och datavetenskap (EECS)

    Author : Jakub Duchniewicz; [2022]
    Keywords : Field Programmable Gate Array; Acceleration; Networking; Embedded Linux; Field Programmable Gate Array; Field Programmable Gate Array; Acceleration; Nätverksarbete; Inbyggd Linux; sprzętowa akceleracja; sieci internetowe; wbudowany system Linux;

    Abstract : With the rise of the Internet of Things and the proliferation of embedded devices equipped with an accelerator arose a need for efficient resource utilization. Hardware acceleration is a complex topic that requires specialized domain knowledge about the platform and different trade-offs that have to be made, especially in the area of power consumption. READ MORE

  6. 5. Offloading Workloads from CPU of Multiplayer Game Server to FPGA : SmartNIC implementation with UDP Communication

    University essay from KTH/Skolan för elektroteknik och datavetenskap (EECS)

    Author : Junwen Bao; [2022]
    Keywords : FPGA; UDP; Multiple-connection Server; Network Communication; Integrated Circuit Design; FPGA; UDP; server med flera anslutningar; nätverkskommunikation; Integrerad kretsdesign;

    Abstract : For multiplayer games, the performance of the server’s Central Processing Unit (CPU) is the main factor that limits the number of players on the server at the same time. Compared with the CPU, the Field-Programmable Gate Array (FPGA) architecture has no instructions set and no shared memory. READ MORE