Essays about: "High level synthesis"

Showing result 11 - 15 of 94 essays containing the words High level synthesis.

  1. 11. A Study on Fault Tolerance of Object Detector Implemented on FPGA

    University essay from KTH/Skolan för elektroteknik och datavetenskap (EECS)

    Author : Tiancheng Yang; [2023]
    Keywords : Object detection; YOLO-v3-tiny; Fault tolerance; FPGA; VHDL; Hardware accelerator; Triple-modular redundancy; Time redundancy; Stuck-at-faults;

    Abstract : Objektdetektering har fått stort forskningsintresse de senaste åren, eftersom det är maskiners ögon och är en grundläggande uppgift inom datorseende som syftar till att identifiera och lokalisera föremål av intresse. Hårdvaruacceleratorer syftar vanligtvis till att öka genomströmningen för realtidskrav samtidigt som energiförbrukningen sänks. READ MORE

  3. 12. Predictive MR Image Generation for Alzheimer’s Disease and Normal Aging Using Diffeomorphic Registration

    University essay from KTH/Skolan för elektroteknik och datavetenskap (EECS)

    Author : Yuqi Zheng; [2023]
    Keywords : Medical Image Generation; Brain Aging; Diffeomorphic Registration; AlzheimerŠs Disease; Medicinsk bildgenerering; Åldrande av hjärnan; DiffeomorĄsk registrering; Alzheimers sjukdom;

    Abstract : Alzheimer´s Disease (AD) is the most prevalent cause of dementia, signifying a progressive and degenerative brain disorder that causes cognitive function deterioration including memory loss, communication difficulties, impaired judgment, and changes in behavior and personality. Compared to normal aging, AD introduces more profound cognitive impairments and brain morphology changes. READ MORE

  4. 13. Develop a Graphical User Interface for the assembler for SiLago Platform

    University essay from KTH/Skolan för elektroteknik och datavetenskap (EECS)

    Author : Yuxuan Wang; [2023]
    Keywords : Graphic intermediate representation; Graphical analytic system; High-level synthesis tool; Grafisk mellanrepresentationen; Grafiskt analytiskt system; Högnivå syntes verktyg;

    Abstract : Vesyla-II is developed as the High-Level Synthesis (HLS) tool serving the SiLago platform. The assembler Manas is a part of the Coarse Grain Reconfigurable Architectures (CGRA) compiler in Vesyla-II, which is used to transform the information from source code into the target language. READ MORE

  5. 14. FPGA Accelerated Digital Image Correlation For Clamping Force Measurement

    University essay from KTH/Skolan för elektroteknik och datavetenskap (EECS)

    Author : János Csanád Csuvarszki; [2023]
    Keywords : Digital image correlation; Field-programmable gate array; High-level synthesis;

    Abstract : Digital image correlation is a contactless optical method used for displacement and strain measurement which has become increasingly popular in the field of experimental mechanics. A specialized use case for the algorithm is to measure the clamping force in bolted joints, a crucial metric when considering the longevity and reliability of the constructs. READ MORE

  6. 15. High Level Synthesis for ASIC and FPGA

    University essay from Lunds universitet/Institutionen för elektro- och informationsteknik

    Author : Malin Heyden; [2023]
    Keywords : HLS; high level synthesis; asic; fpga; catapult; filter; sfir; Technology and Engineering;

    Abstract : This thesis aims to evaluate the performance of Siemens’ High Level Synthesis (HLS) tool Catapult. HLS can be considered the next step up in abstraction level from writing traditional Register Transfer Level (RTL) code which is time consuming and error prone. READ MORE