Essays about: "Network on chip NOC Routing"

Showing result 1 - 5 of 9 essays containing the words Network on chip NOC Routing.

  1. 1. Design of the SiLago GNOC

    University essay from KTH/Skolan för elektroteknik och datavetenskap (EECS)

    Author : Weiyao Tang; [2022]
    Keywords : Synchoros Blocks; SiLago models; Network on Chips; Routing Algorithm and Deadlock; Physical Design; Synchoros-block; SiLago-modeller; nätverk på chip; routingalgoritm och dödläge; fysisk design;

    Abstract : Synchoros VLSI design style can be an alternative choice to fit the increasing complexity of embedded multi-processor architectures. SiLago Block is part of the synchoros blocks, which can effectively reduce the cost of logic and physical synthesis as it is hardened and highly centralized details from each layer of metal. READ MORE

  2. 2. Short Message Network-On-Chip Interconnect for ASIC

    University essay from KTH/Skolan för informations- och kommunikationsteknik (ICT)

    Author : Ejaz Sadiq; [2014]
    Keywords : ;

    Abstract : The rise of large scale integration has resulted in large number of processing elements/cores on a single ASIC. Thus an efficient interconnect scheme between the different processing elements and interfaces is required. Bus based interconnect poses problems such as non-scalability. READ MORE

  3. 3. Router Architecture for Junction Based Source Routing:Design and FPGA Prototyping

    University essay from JTH, Data- och elektroteknik

    Author : Muhammad Awais Aslam; [2012]
    Keywords : JBR router; router architecture; NoC router design; router architecture for JBR;

    Abstract : The increase in the number of cores that can be integrated on a single chip has forced the designer to use computer network concepts for design of System on Chip (SoC). This idea led to development of Network on Chip (NoC) to deal with more cores on a single chip. READ MORE

  4. 4. Extended Junction Based Source Routing Technique for Large Mesh Topology Network on Chip Platforms

    University essay from JTH, Data- och elektroteknik

    Author : Usman Mazhar Mirza; [2011]
    Keywords : Networks on Chip NoC ; System on Chip SoC ; Routing Algorithms; Source Routing; Junction Based Routing JBR ; Extended Junction Based Routing EJBR ; Packet Switched Networks; On Chip Communication; Core Based Design;

    Abstract : Network on Chip (NoC) has been proposed as a scalable and flexible interconnect infrastructure for communication among hundreds of cores on a core-based System on Chip. Routing algorithm affects the communication performance of a NoC. Therefore, many researchers have proposed different routing techniques in their work. READ MORE

  5. 5. JUNCTION BASED ROUTING: A NOVEL TECHNIQUE FOR LARGE NETWORK ON CHIP PLATFORMS

    University essay from JTH, Data- och elektroteknik

    Author : Shabnam Badri; [2011]
    Keywords : ;

    Abstract : Abstract To support communication among hundreds of cores on a chip, on-chip communication must be well organized. In the embedded systems using such a chip, the communication patterns can be profiled and routing can be well planned off-line. Source routing, with many advantages over distributed routing, will be very suitable in such contexts. READ MORE