Essays about: "Network-on-Chip"

Showing result 1 - 5 of 29 essays containing the word Network-on-Chip.

  1. 1. Global clock distribution in the SiLago platform

    University essay from KTH/Skolan för elektroteknik och datavetenskap (EECS)

    Author : Jordi Altayó; [2020]
    Keywords : ;

    Abstract : The extreme evolution of Very Large Scale Integration (VLSI) design has followed Moore’s law for the past decades, which predicts a doubling of the number of transistors that can be implemented on a chip every 18 months. However, tightly coupled with the evolution of the technology capabilities, the complexity during the implementation of such designs has also increased dramatically. READ MORE

  2. 2. Low Density Parity Check Encoder and Decoder on SiLago Coarse Grain Reconfigurable Architecture

    University essay from KTH/Skolan för elektroteknik och datavetenskap (EECS)

    Author : Weijiang Kong; [2019]
    Keywords : LDPC; CGRA; Reconfigurable architecture; VLSI design; ASIC; LDPC; CGRA; Konfigurerbar arkitektur; VLSI design; ASIC;

    Abstract : Low density parity check (LDPC) code is an error correction code that has been widely adopted as an optional error correcting operation in most of today’s communication protocols. Current design of ASIC or FPGA based LDPC accelerators can reach Gbit/s data rate. READ MORE

  3. 3. Study of Scalable Architectures on FPGA for Space Data Processors

    University essay from KTH/Skolan för elektroteknik och datavetenskap (EECS)

    Author : Borja Revuelta Fernández; [2018]
    Keywords : ;

    Abstract : Spacecrafts are notably complex systems designed and constructed in multidisciplinary teams. The on-board computer of a spacecraft is part of the on-board data systems in charge of the on-board processing and handling of payload data collected from the instruments, which require high-performance radiationhardened-by-design (RHBD) processing devices. READ MORE

  4. 4. Dynamic Process Relocation in Multiprocessor Systems : Mixed-Criticality Aware Implementation

    University essay from KTH/Skolan för informations- och kommunikationsteknik (ICT)

    Author : Tage Mohammadat; [2017]
    Keywords : ;

    Abstract : Enabling deterministic dynamic process relocation in electronic systems creates opportunities for dynamic computational load balancing, fault tolerance, power consumption management, which can be positively correlated with improvements in longevity, safety and energy-efficiency. Additionally, dynamic process relocation can be leveraged to enhance the adaptability of mixed-critical systems operating in open and changeable environments, which is a current market driver for safety-concerned industries like avionics, automotive and railways. READ MORE

  5. 5. Implementation of a Distributed Fault-Tolerant NoC-based Architecture for the Single-Event Upset Detector

    University essay from KTH/Skolan för informations- och kommunikationsteknik (ICT)

    Author : Eleftherios Kyriakakis; [2017]
    Keywords : ;

    Abstract : Today, with the rise of the private sector in space exploration, space missions are becoming more frequent than before. This in relation to the fact that modern electronics scale both faster and denser, the effects of radiation become a critical design requirement for fault-tolerance in on-board space computer systems. READ MORE