Essays about: "NoC"

Showing result 1 - 5 of 35 essays containing the word NoC.

  1. 1. Global clock distribution in the SiLago platform

    University essay from KTH/Skolan för elektroteknik och datavetenskap (EECS)

    Author : Jordi Altayó; [2020]
    Keywords : ;

    Abstract : The extreme evolution of Very Large Scale Integration (VLSI) design has followed Moore’s law for the past decades, which predicts a doubling of the number of transistors that can be implemented on a chip every 18 months. However, tightly coupled with the evolution of the technology capabilities, the complexity during the implementation of such designs has also increased dramatically. READ MORE

  2. 2. Low Density Parity Check Encoder and Decoder on SiLago Coarse Grain Reconfigurable Architecture

    University essay from KTH/Skolan för elektroteknik och datavetenskap (EECS)

    Author : Weijiang Kong; [2019]
    Keywords : LDPC; CGRA; Reconfigurable architecture; VLSI design; ASIC; LDPC; CGRA; Konfigurerbar arkitektur; VLSI design; ASIC;

    Abstract : Low density parity check (LDPC) code is an error correction code that has been widely adopted as an optional error correcting operation in most of today’s communication protocols. Current design of ASIC or FPGA based LDPC accelerators can reach Gbit/s data rate. READ MORE

  3. 3. Virtual-Channel Based Wormhole NoC on FPGA for ForSyDe/NoC System Generator Tool Suite

    University essay from KTH/Skolan för elektroteknik och datavetenskap (EECS)

    Author : Zhang Runzi; [2018]
    Keywords : ;

    Abstract : Nowadays, the number of processors integrated on system-on-chip (SoC) increases rapidly and makes multiprocessor system-on-chip design (MPSoC) a regular feature of the embedded system. [25] To support the communication between several homogeneous or heterogeneous processors a communication infrastructure, Networkon-Chip (NoC) technology was raised more than ten years ago. READ MORE

  4. 4. A Reconfigurable Device for GALS Systems

    University essay from KTH/Skolan för elektroteknik och datavetenskap (EECS)

    Author : Rocco Sciaraffa; [2018]
    Keywords : FPGA; GALS; asynchronous; coarse-grained; NoC; bundled-data; FPGA; GALS; asynkron; Coarse-Grained Reconfigu- rable; NoC; bundled data kommunikation;

    Abstract : Globally Asynchronous Locally Synchronous (GALS) Field-Programmable Gate Array (FPGA) are composed of standard synchronous reconfigurable logic islands that communicate with each other via an asynchronous means. Past research into fully asynchronous FPGA has demonstrated high throughput and reliability adopting dual-rail encoding. READ MORE

  5. 5. Study of Scalable Architectures on FPGA for Space Data Processors

    University essay from KTH/Skolan för elektroteknik och datavetenskap (EECS)

    Author : Borja Revuelta Fernández; [2018]
    Keywords : ;

    Abstract : Spacecrafts are notably complex systems designed and constructed in multidisciplinary teams. The on-board computer of a spacecraft is part of the on-board data systems in charge of the on-board processing and handling of payload data collected from the instruments, which require high-performance radiationhardened-by-design (RHBD) processing devices. READ MORE