Essays about: "Phase locked loops"
Showing result 1 - 5 of 10 essays containing the words Phase locked loops.
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1. A digital integer-N PLL architecture using a pulse-shrinking TDC for mmWave applications.
University essay from KTH/Skolan för elektroteknik och datavetenskap (EECS)Abstract : With the move of the broadband cellular network towards 5G taking off and the preparatory work on 6G and beyond starting, the need for low-complexity, low-power, and high-performance frequency synthesis using Phase-Locked Loop (PLL)s increases. As we get deeper into the mm-wave frequencies and push towards frequencies in the order of 50-70 GHz design challenges with existing PLL architectures, such as limited technology scaling and limited in-band noise performance become more apparent. READ MORE
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2. Phase Locked Loop using LABVIEW
University essay from Linnéuniversitetet/Institutionen för fysik och elektroteknik (IFE)Abstract : The phase-locked loop is an important concept in the field of wireless communication. PLL:s have wide-ranging applications in many electronic circuits. The history and the basic principle of the phase-locked loop are discussed. READ MORE
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3. Vicinity Integrated Circuit Card Emulation of ISO15693 in NFC Devices
University essay from Uppsala universitet/Institutionen för informationsteknologiAbstract : This thesis describes the work flow of integrating a new digital design in an existing integrated circuit, the SN100V designed by NXP. The new digital design enables theSN100V for emulating ISO 15693 card, which is not available yet in any near field radio device. READ MORE
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4. Phase Locked Loops in Fully Integrated NB-IoT Transceivers
University essay from Lunds universitet/Institutionen för elektro- och informationsteknikAbstract : This thesis investigates how to fulfill the Narrow Band - Internet of Things (NB-IoT) specification for a fully integrated transceiver in the phase locked loop's (PLL) perspective. Designing a fully integrated transceiver, integrating a power amplifier (PA) is challenging as it leads to frequency pulling of the voltage controlled oscillator (VCO) in the PLL, deteriorating the performance. READ MORE
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5. DLL Based Reference Multiplier for the use in a PLL for WLAN applications
University essay from Lunds universitet/Fysiska institutionenAbstract : This master’s thesis project report deals with the design of multiplier for the reference signal to the Phase Locked Loop (PLL) used in WLAN application. The reference multiplier designed is based on a newly proposed architecture of dual loop feedback Delay Locked Loop (DLL) in which multiplication is performed within the loops. READ MORE
