Essays about: "Phase-locked Loop PLL"
Showing result 1 - 5 of 31 essays containing the words Phase-locked Loop PLL.
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1. Development and Analysis of Small Signal DQ-Frame Model for Low Frequency Stability of Train Converters
University essay from KTH/Skolan för elektroteknik och datavetenskap (EECS)Abstract : In order to meet the increasing demand for sustainable transportation, trains need to run with tighter schedules, more departures and more trains in depot. Multiple trains in depot has been linked to low frequency instability at many locations around the world. READ MORE
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2. A Low Noise Digitally Controlled Oscillator for a Wi-Fi 6 All-Digital PLL
University essay from KTH/Skolan för elektroteknik och datavetenskap (EECS)Abstract : Following the rise of Internet of Things (IoT), or just the technological advancements and expectations in a world where the things are or will be connected, new demands are put on Integrated Circuit (IC) for wireless connectivity. The use cases seem endless; smart home, healthcare, entertainment, and science are all areas that can benefit from connectivity of low power electronics. READ MORE
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3. A Digital Phase-Locked Loop for Frequency Synthesis using an Adaptive Pulse Shrinking TDC
University essay from Lunds universitet/Institutionen för elektro- och informationsteknikAbstract : This thesis investigates a new type of Phase-Locked Loop (PLL) architecture which combines a phase/frequency detector (PFD) and a digital loop filter. The quantization is done by a time-to-digital converter which continuously shrinks the pulse coming from the PFD and registers how far it propagates. READ MORE
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4. A digital integer-N PLL architecture using a pulse-shrinking TDC for mmWave applications.
University essay from KTH/Skolan för elektroteknik och datavetenskap (EECS)Abstract : With the move of the broadband cellular network towards 5G taking off and the preparatory work on 6G and beyond starting, the need for low-complexity, low-power, and high-performance frequency synthesis using Phase-Locked Loop (PLL)s increases. As we get deeper into the mm-wave frequencies and push towards frequencies in the order of 50-70 GHz design challenges with existing PLL architectures, such as limited technology scaling and limited in-band noise performance become more apparent. READ MORE
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5. Closed-loop control and data- recording of a modular-multilevel converter (MMC)
University essay from KTH/Skolan för elektroteknik och datavetenskap (EECS)Abstract : Modular multilevel converters (MMCs) are the preferred converter solution in flexible ac transmission systems (FACTS) and high-voltage direct current (HVDC) applications. This is due to the high quality of the voltage and current signals, lower overall losses, and fewer problems with switching-related EMI. READ MORE