Essays about: "System level design"

Showing result 11 - 15 of 1052 essays containing the words System level design.

1. 11. Code Synthesis for Heterogeneous Platforms

   University essay from KTH/Skolan för elektroteknik och datavetenskap (EECS)

   Author : Zhouxiang Fu; [2023]
   Keywords : Code Synthesis; Heterogeneous Platform; Zero-Overhead Topology Infrastructure; Kodsyntes; Heterogen plattform; Zero-Overhead Topologi Infrastruktur;

   Abstract : Heterogeneous platforms, systems with both general-purpose processors and task-specific hardware, are largely used in industry to increase efficiency, but the heterogeneity also increases the difficulty of design and verification. We often need to wait for the completion of all the modules to know whether the functionality of the design is correct or not, which can cause costly and tedious design iteration cycles. READ MORE

3. 12. Influence of Varying Electric Light Distribution on Melanopic Equivalent Daylight Illuminance and Lighting Energy Use

   University essay from Lunds universitet/Institutionen för arkitektur och byggd miljö; Lunds universitet/Avdelningen för Energi och byggnadsdesign

   Author : Rebecka Ståhl; Parvathy Biju; [2023]
   Keywords : Alertness; Circadian Entrainment; Clear Sky; Correlated Colour Temperature; Daylighting; Direct Electric Lighting; Direct-Indirect Electric Lighting; Energy-Efficiency; Grasshopper; Integrative Lighting; LARK 2.0; Melanopic Equivalent Daylight Illuminance; Overcast Sky; Photopic Illuminance; Spectral Power Distribution.; Technology and Engineering;

   Abstract : Human beings in modern society spend more than 90% of their time indoors to live, work, and socialize. To improve health, quality of life and task performance, integrative lighting is designed to give the right light at the right time at the eye to stimulate circadian entrainment. READ MORE

4. 13. Redesigning an automated production cell for increased efficiency : Discrete-Event Simulation as a tool to evaluate system designs

   University essay from Mälardalens universitet/Industriell ekonomi och organisation; Mälardalens universitet/Akademin för innovation, design och teknik

   Author : Noah Paillon; William Reimer; [2023]
   Keywords : Discrete Event Simulation; Key Performance Indicators;

   Abstract : Date:    4th June 2023 Level:    Master Thesis in Product- and Process Development, 30 ECTS Authors:   William Reimer   Noah Paillon Title:    Redesigning automated production cell for increased efficiency - Discrete-Event Simulation as a tool to evaluate system designs Keywords:   Discrete Event Simulation (DES), Redesign, Production process, Automated Manufacturing System (AMS), Automated production cell, Robotics in production, Simulation, Key Performance indicators (KPIs), Decision-making, Redesigning production systems, Bottlenecks, Deadlocks, Production system development (PSD). Aim:    The aim of this study is to evaluate and redesign an automated production cell at a Swedish manufacturing plant using DES with KPIs, with the goal of increasing the efficiency. READ MORE

5. 14. Multi-Robot Motion Planning Under High-Level Task Specifications

   University essay from KTH/Skolan för elektroteknik och datavetenskap (EECS)

   Author : Axel Abrahamsson; Lukas Granqvist; [2023]
   Keywords : ;

   Abstract : This bachelor thesis explores the use of Signal Temporal Logic (STL) and ControlBarrier Functions (CBFs) to address the challenges associated with multi-robot motionplanning under high-level task specifications. STL is a formalism used to specify temporalproperties of signals, while CBFs are used to enforce safety constraints. READ MORE

6. 15. Optimizing the instruction scheduler of high-level synthesis tool

   University essay from KTH/Skolan för elektroteknik och datavetenskap (EECS)

   Author : Zihao Xu; [2023]
   Keywords : Instruction scheduling; Scheduling algorithm; CGRA; High-level Sythnesis; SiLago; Algorithm-level Synthesis; Constraint programming; Instruktion schemaläggning; schemaläggning algoritm; CGRA; High-level Sythnesis; SiLago; Algoritm-nivå Synthesis; Constraint programmering;

   Abstract : With the increasing complexity of the chip architecture design for meeting different application requirements, the corresponding instruction scheduler of high-level synthesis tool needs to solve complex scheduling problems. Dynamically Reconfigurable Resource Array (DRRA) is a novel architecture based on Coarse-Grained Reconfigurable Architecture (CGRA) on SiLago platform, the instruction scheduler of Vesyla-II, the dedicated High-Level Synthesis (HLS) tool targets for DRRA needs to schedule the specific instruction sets designed for Distributed Two-level Control System (D2LC). READ MORE