Essays about: "TLB"

Found 3 essays containing the word TLB.

1. 1. Investigating Memory Characteristics of Corner Detection Algorithms using Multi-core Architectures

   University essay from Mälardalens högskola/Akademin för innovation, design och teknik

   Author : André Sääf; Alvin Samuelsson; [2017]
   Keywords : Corner Detection; Memory Characteristics; Harris; SUSAN;

   Abstract : In this thesis, we have evaluated the memory characteristics and parallel behaviour of the SUSAN (Smallest Univalue Segment Assimilating Nucleus) and Harris corner detection algorithms. Our purpose is understanding how the memory affects the predictability of these algorithms and furthermore how we can use multi-core machines to improve the execution time of such algorithms. READ MORE

3. 2. Performance Optimisation of Discrete-Event Simulation Software on Multi-Core Computers

   University essay from KTH/Skolan för datavetenskap och kommunikation (CSC)

   Author : Alain E. Kaeslin; [2016]
   Keywords : cache hierarchy; caches; communication overhead; data structures; discrete-event simulation; heap memory; linear speedup; logistic support; low-overhead profiler; memory allocator; microarchitecture; microarchitecture analysis; multi-core; optimisation; parallel execution; profiler; runtime; scalability; scalability bottlenecks; scalable memory allocator; simulation; translation lookaside buffer; translation lookaside buffer thrashing; TLB;

   Abstract : SIMLOX is a discrete-event simulation software developed by Systecon AB for analysing logistic support solution scenarios. To cope with ever larger problems, SIMLOX's simulation engine was recently enhanced with a parallel execution mechanism in order to take advantage of multi-core processors. READ MORE

4. 3. Performance monitoring on high-end general processing boards using hardware performance counters

   University essay from KTH/Skolan för informations- och kommunikationsteknik (ICT)

   Author : Gabor Andai; [2015]
   Keywords : ;

   Abstract : Most of the advanced microprocessors today incorporate on-chip hardware performance counters. These counters are capable to count various events in a non-invasive way, while executing real workloads. Events such as the number of instructions, memory accesses, cache and TLB misses are the most common ones that can be precisely measured. READ MORE