Essays about: "analog cmos"

Showing result 1 - 5 of 57 essays containing the words analog cmos.

1. 1. Investigation of Analog Calibration Systems for Spurious Tone Suppression in Frequency Triplers

   University essay from Lunds universitet/Institutionen för elektro- och informationsteknik

   Author : Cristian Alexandru Ghihanis; Barath Copparam Santhanakrishnan Sudarsan; [2023]
   Keywords : Delay-Locked Loop; DLL; Edge-Combining; EC; EC DLL; Edge-Combining Delay-Locked Loop; spurious tone calibration; spurs calibration; spurious tones compensation; spurs compensation; Technology and Engineering;

   Abstract : The market for Wi-Fi receiver designs for latest Wi-Fi standards, that cover RF bands in the 2.4 GHz, 5 GHz and 6 GHz spectrum, require increasingly stringent power consumption limitations as more of the market is driven towards battery-powered devices. READ MORE

3. 2. Current-Mode Class D Power Amplifier for 2.4GHz Wi-Fi

   University essay from KTH/Skolan för elektroteknik och datavetenskap (EECS)

   Author : Yann Jean Michael Pirot; [2023]
   Keywords : Power Amplifier; Wifi; Digital Power Amplfier; Class D; RFIC; Analogue; Effektförstärkare; Wifi; digital förstärkare; klass D; analog;

   Abstract : Modern wireless communication techniques employed in the Wi-Fi® protocol, such as orthogonal frequency-division multiplexing exhibit analogue signals with high peak-to-average power ratio. Therefore, power amplifiers for Wi-Fi suffer from low efficiency when operating in back-off mode, away from their maximum efficiency at peak power. READ MORE

4. 3. Evaluation of Discrete-Time Wideband Receivers for NB-IoT

   University essay from Lunds universitet/Institutionen för elektro- och informationsteknik

   Author : Magnus Wasting; [2021]
   Keywords : Discrete; time; filter; NB-IoT; Charge; Sharing; CMOS; Technology and Engineering;

   Abstract : A receiver that covers several RF bands requires multiple front-end filters which increases the cost in terms of components and/or board/silicon area. Front-end filters assist a receiver to withstand interference at multiples of its down-conversion frequency. READ MORE

5. 4. A design of a 100 MS/s, 8-bit Pipelined ADC in CMOS

   University essay from Lunds universitet/Institutionen för elektro- och informationsteknik

   Author : Shen Zhang; [2021]
   Keywords : Technology and Engineering;

   Abstract : The thesis focuses on designing and simulating an 8-bit high-speed fully differential pipelined Analog to Digital Converter (ADC) in the 65nm Complementary Metal-Oxide-Semiconductor (CMOS) technology by using the software Cadence Virtuoso. The aim is to increase the operation speed of the ADC for communication systems without reducing the performance, in the meantime, the low power consumption and the low complexity should also be required when considering future implementation. READ MORE

6. 5. Design of a 12-bit 200-MSps SAR Analog-to-Digital converter

   University essay from KTH/Skolan för elektroteknik och datavetenskap (EECS)

   Author : Luca Ricci; [2020]
   Keywords : ;

   Abstract : The Successive Approximation (SAR) Analog-to-Digital converter is one of the most energy-efficient A/D converter. In this thesis, the development of a SAR ADC in a 28-nm CMOS technology based on charge redistribution is presented. READ MORE