Essays about: "delay locked loop"

Showing result 1 - 5 of 8 essays containing the words delay locked loop.

  1. 1. Investigation of Analog Calibration Systems for Spurious Tone Suppression in Frequency Triplers

    University essay from Lunds universitet/Institutionen för elektro- och informationsteknik

    Author : Cristian Alexandru Ghihanis; Barath Copparam Santhanakrishnan Sudarsan; [2023]
    Keywords : Delay-Locked Loop; DLL; Edge-Combining; EC; EC DLL; Edge-Combining Delay-Locked Loop; spurious tone calibration; spurs calibration; spurious tones compensation; spurs compensation; Technology and Engineering;

    Abstract : The market for Wi-Fi receiver designs for latest Wi-Fi standards, that cover RF bands in the 2.4 GHz, 5 GHz and 6 GHz spectrum, require increasingly stringent power consumption limitations as more of the market is driven towards battery-powered devices. READ MORE

  3. 2. Ultra-stable frequency transfer using optical fibers

    University essay from Lunds universitet/Atomfysik; Lunds universitet/Fysiska institutionen

    Author : Simon Preutz; [2016]
    Keywords : Optics; optical fibers; stability; time; optical clocks; control.; Technology and Engineering;

    Abstract : A new era of precise time measurement came with the atomic clock. The technology is vital to navigations systems like GPS and to accurate physical measurements. READ MORE

  4. 3. Firmware Design and Implementation for a 14-bit Analog-to-Digital Converter to be used in the PANDA Experiment

    University essay from Uppsala universitet/Institutionen för informationsteknologi

    Author : Peter Moris; [2015]
    Keywords : ;

    Abstract : Development of the VHDL firmware for a high-speed Analogue to Digital Converter (ADC) is the focus of this paper, including writing, debug- ging and evaluation of said firmware. The finished version of the firmware is able to correctly convert analogue signals received by the ADC into their digital representations. READ MORE

  5. 4. DLL Based Reference Multiplier for the use in a PLL for WLAN applications

    University essay from Lunds universitet/Fysiska institutionen

    Author : Kamal Gupta; [2015]
    Keywords : reference multiplier; Frequency synthesizer; Frequency multiplier; PLL; DLL; Delay locked loop; VCDL; inverter-based VCDL; charge pump; XOR phase detector; phase noise; 4X multiplier; Technology and Engineering;

    Abstract : This master’s thesis project report deals with the design of multiplier for the reference signal to the Phase Locked Loop (PLL) used in WLAN application. The reference multiplier designed is based on a newly proposed architecture of dual loop feedback Delay Locked Loop (DLL) in which multiplication is performed within the loops. READ MORE

  6. 5. Design of a Time-to-Digital Converter for an All-Digital Phase Locked Loop for the 2-GHz Band

    University essay from Linköpings universitet/Elektroniksystem; Linköpings universitet/Tekniska högskolan

    Author : Naveen Wali; Balamurali Radhakrishnan; [2013]
    Keywords : ADPLL; TDC; DPLL; PLL;

    Abstract : An all-digital phase locked loop for WiGig systems was implemented. The developedall-digital phase locked loop has a targeted frequency range of 2.1-GHz to2.5-GHz. READ MORE