Essays about: "filter VHDL Code Implementation"

Found 3 essays containing the words filter VHDL Code Implementation.

1. 1. High Level Synthesis for ASIC and FPGA

   University essay from Lunds universitet/Institutionen för elektro- och informationsteknik

   Author : Malin Heyden; [2023]
   Keywords : HLS; high level synthesis; asic; fpga; catapult; filter; sfir; Technology and Engineering;

   Abstract : This thesis aims to evaluate the performance of Siemens’ High Level Synthesis (HLS) tool Catapult. HLS can be considered the next step up in abstraction level from writing traditional Register Transfer Level (RTL) code which is time consuming and error prone. READ MORE

3. 2. Design and Implementation of Sampling Rate Converters for Conversions between Arbitrary Sampling Rates

   University essay from Institutionen för systemteknik

   Author : Fedor Merkelov; Yaroslav Kodess; [2004]
   Keywords : Electronics; VHDL code generator; digital filter; ajustable delay; Farrow; sampling rate converter; Elektronik;

   Abstract : In different applications, in digital domain, it is necessary to change the sampling rate by an arbitrary number. For example Software Radio which should handle different conversion factors and standards. This work focuses on the problem of designing and implement sampling rate converters for conversions between arbitrary sampling rates. READ MORE

4. 3. Cosine Modulated Filter Banks

   University essay from Institutionen för systemteknik

   Author : Magnus Nord; [2003]
   Keywords : Electronics; filter banks; DCT; implementation; FPGA; VHDL; DIT; DIF; Elektronik;

   Abstract : The initial goal of this report was to implement and compare cosine modulated filter banks. Because of time limitations, focus shifted towards the implementation. Filter banks and multirate systems are important in a vast range of signal processing systems. When implementing a design, there are several considerations to be taken into account. READ MORE