Essays about: "memory access conflict"
Found 5 essays containing the words memory access conflict.
-
1. How software prefetching affects transactional memory applications with high commit ratio
University essay from Uppsala universitet/Institutionen för informationsteknologiAbstract : Transactional Memory is a concurrency control model that allows programmers to write code that access shared data consistently by marking sequential multi-operation regions as atomic transactions. While transactions make programming easier, the lack of progress guarantees as well as the cost of re-executing a conflicting transaction leaves room for improvement. READ MORE
-
2. Minimising Memory Access Conflicts for FFT on a DSP
University essay from Linköpings universitet/DatorteknikAbstract : The FFT support in an Ericsson's proprietary DSP is to be improved in order to achieve high performance without disrupting the current DSP architecture too much. The FFT:s and inverse FFT:s in question should support FFT sizes ranging from 12-2048, where the size is a multiple of prime factors 2, 3 and 5. READ MORE
-
3. Load Balancing of Parallel Tasks using Memory Bandwidth Restrictions
University essay from Mälardalens högskola/Akademin för innovation, design och teknikAbstract : Shared resource contention is a significant problem in multi-core systems and can have a negative impact on the system. Memory contention occurs when the different cores in a processor access the same memory resource, resulting in a conflict. READ MORE
-
4. Efficient Cache Randomization for Security
University essay from Uppsala universitet/Institutionen för informationsteknologiAbstract : The effectiveness of cache hierarchies, undeniably, is of crucial importance, since they essentially constitute the solution to the disparity between fast processors and high memory latency. Nevertheless, security developments spanning for more than the last decade, critically expose cache hierarchies' vulnerabilities, thus creating a need for counter-measures to take place. READ MORE
-
5. Automatic Parallel Memory Address Generation for Parallel DSP Computing
University essay from Institutionen för systemteknikAbstract : The concept of Parallel Vector (scratch pad) Memories (PVM) was introduced as one solution for Parallel Computing in DSP, which can provides parallel memory addressing efficiently with minimum latency. The parallel programming more efficient by using the parallel addressing generator for parallel vector memory (PVM) proposed in this thesis. READ MORE
