Essays about: "memory profiling"
Showing result 1 - 5 of 16 essays containing the words memory profiling.
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1. A comparative performance analysis of Fast Fourier Transformation and Gerstner waves
University essay from Blekinge Tekniska Högskola/Institutionen för datavetenskapAbstract : Background: As time moves on hardware is able to tackle heavier and more complex computations in real-time systems. This means that more realistic and stylistic environments can be computed. One of these environments is the ocean. READ MORE
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2. Performance Evaluation of Kotlin Multiplatform Mobile and Native iOS Development in Swift
University essay from KTH/Skolan för elektroteknik och datavetenskap (EECS)Abstract : Today's mobile development resides in the two main operating systems Android and iOS. It is popular to develop mobile applications individually for each respective platform, referred to as native development. To reduce additional costs, cross-platform solutions have emerged that enable shared development for both platforms. READ MORE
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3. Evaluation of cache memory configurations with performance monitoring in embedded real-time automotive systems : Determining performance characteristics of cache memory with hardware counters and software profiling.
University essay from KTH/Skolan för elektroteknik och datavetenskap (EECS)Abstract : Modern day automotive systems are highly dependent on real-time software control to manage the powertrain and high-level features, such as cruise control. The computational power available has increased tremendously from decades of microcontroller and hardware development on such platforms. READ MORE
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4. Analysing Aliasing in Java Applications
University essay from Uppsala universitet/Institutionen för informationsteknologiAbstract : Aliasing refers to the possibility of having multiple references to the same memory location and is a cornerstone concept in the imperative programming paradigm. As applications grow large, it is hard for programmers to keep track of all places in the code where they employ aliasing, possibly resulting in hard-to-predict runtime errors. READ MORE
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5. Low power memory controller subsystem IP exploration using RTL power flow : An End-to-end power analysis and reduction Methodology
University essay from KTH/Skolan för elektroteknik och datavetenskap (EECS)Abstract : With FinFET based Application Specific Integrated Circuit (ASIC) designs delivering on the promises of scalability, performance, and power, the road ahead is bumpy with technical challenges in building efficient ASICs. Designers can no longer rely on the ‘auto-scaling’ power reduction that follows technology node scaling, in these times when 7nm presents itself as a ‘long-lived’ node. READ MORE