Essays about: "thesis ADC comparator design"
Showing result 1 - 5 of 12 essays containing the words thesis ADC comparator design.
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1. Comparator Design for High-Speed ADCs
University essay from Linköpings universitet/Elektroniska Kretsar och SystemAbstract : As wireless communication is ever-evolving, demanding higher data speeds, the requirementsincrease for the ADC, and the requirements for the comparator, which is one of the mainbuilding blocks, increase as well. The primary purpose of the comparator is to compare twovoltage levels and provide a logic output. READ MORE
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2. Design and Verification of An Energy-Efficient Edge-Pursuit Comparator
University essay from KTH/Skolan för elektroteknik och datavetenskap (EECS)Abstract : With the rapid development of mobile communication, sensors, and biomedical in recent years, the demand for accurate data information, highquality audio and image has become much more significant, which requires a high-precision Analog to Digital Converter (ADC) to process weak analog signals. As one of the core modules of ADC, the comparator’s precision, speed, stability, and noise play a key role in the performance of the whole circuit. READ MORE
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3. A design of a 100 MS/s, 8-bit Pipelined ADC in CMOS
University essay from Lunds universitet/Institutionen för elektro- och informationsteknikAbstract : The thesis focuses on designing and simulating an 8-bit high-speed fully differential pipelined Analog to Digital Converter (ADC) in the 65nm Complementary Metal-Oxide-Semiconductor (CMOS) technology by using the software Cadence Virtuoso. The aim is to increase the operation speed of the ADC for communication systems without reducing the performance, in the meantime, the low power consumption and the low complexity should also be required when considering future implementation. READ MORE
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4. Design of a 12-bit 200-MSps SAR Analog-to-Digital converter
University essay from KTH/Skolan för elektroteknik och datavetenskap (EECS)Abstract : The Successive Approximation (SAR) Analog-to-Digital converter is one of the most energy-efficient A/D converter. In this thesis, the development of a SAR ADC in a 28-nm CMOS technology based on charge redistribution is presented. READ MORE
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5. Implementation of a 200 MSps 12-bit SAR ADC
University essay from Lunds universitet/Institutionen för elektro- och informationsteknikAbstract : Analog-to-digital converters (ADCs) with high conversion frequency, often based on pipelined architectures, are used for measuring instruments, wireless communication and video applications. Successive approximation register (SAR) converters offer a compact and power efficient alternative but the conversion speed is typically designed for lower frequencies. READ MORE
