Essays about: "thesis for programming application"
Showing result 1 - 5 of 309 essays containing the words thesis for programming application.
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1. A cybersecurity audit of the Garmin Venu
University essay from KTH/Skolan för elektroteknik och datavetenskap (EECS)Abstract : The presence of smart wearables has established itself as a norm of the 21 st century, but the state of their trustworthiness from the viewpoint of personal safety remains debatable. The information gathered by such devices has great potential for personal safety risks and must be handled safely. READ MORE
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2. A case study of disjunctive programming: Determining optimal motion trajectories for a vehicle by mixed-integer optimization
University essay from KTH/Skolan för teknikvetenskap (SCI)Abstract : This report considers an application of mixed-integer disjunctive programming (MIDP)where a theoretical robot can jump from one point to another and where the number ofjumps is to be minimized. The robot is only able to jump to the north, south, east andwest. READ MORE
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3. FPGA programming with VHDL : A laboratory for the students in the Switching Theory and Digital Design course
University essay from Högskolan i HalmstadAbstract : This thesis aims to create effective and comprehensive learning materials for students enrolled in the Switching Theory and Digital Design course. The lab is designed to enable students to program an FPGA using VHDL in the Quartus programming environment to control traffic intersections with sensors and traffic signals. READ MORE
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4. Model Based Testing for Programmable Data Planes
University essay from Luleå tekniska universitet/Institutionen för system- och rymdteknikAbstract : The advent of Software Defined Networking (SDN) and programmable data planes has revolutionized the networking domain, enabling the programming of networking functions down to the silicon level responsible for data packet switching. Unfortunately, while this programmability offers greater flexibility and control, it also increases the likelihood of introducing software bugs. READ MORE
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5. Optimizing the instruction scheduler of high-level synthesis tool
University essay from KTH/Skolan för elektroteknik och datavetenskap (EECS)Abstract : With the increasing complexity of the chip architecture design for meeting different application requirements, the corresponding instruction scheduler of high-level synthesis tool needs to solve complex scheduling problems. Dynamically Reconfigurable Resource Array (DRRA) is a novel architecture based on Coarse-Grained Reconfigurable Architecture (CGRA) on SiLago platform, the instruction scheduler of Vesyla-II, the dedicated High-Level Synthesis (HLS) tool targets for DRRA needs to schedule the specific instruction sets designed for Distributed Two-level Control System (D2LC). READ MORE