Essays about: "verilog fpga"
Showing result 1 - 5 of 16 essays containing the words verilog fpga.
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1. Exploring Ethernet Switching Architectures for Area-Efficient Low-End Switches
University essay from Lunds universitet/Institutionen för elektro- och informationsteknikAbstract : The aim of this thesis project has been to develop an architecture for L2 ethernet switches that would be optimized for silicon area, targeting smaller low-end switches. A selection was made of three different switching architectures, which were compared and analyzed to explore the benefits and drawbacks of different approaches. READ MORE
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2. High Level Synthesis for ASIC and FPGA
University essay from Lunds universitet/Institutionen för elektro- och informationsteknikAbstract : This thesis aims to evaluate the performance of Siemens’ High Level Synthesis (HLS) tool Catapult. HLS can be considered the next step up in abstraction level from writing traditional Register Transfer Level (RTL) code which is time consuming and error prone. READ MORE
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3. Network Implementation with TCP Protocol : A server on FPGA handling multiple connections
University essay from KTH/Skolan för elektroteknik och datavetenskap (EECS)Abstract : The growing number of players in Massively Multiplayer Online games puts a heavy load on the network infrastructure and the general-purpose CPU of the game servers. A game server’s network stack processing needs equal treatment to the game-related processing ability. READ MORE
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4. Validation of efficiency of formal verification methodology for verification closure
University essay from KTH/Skolan för elektroteknik och datavetenskap (EECS)Abstract : Application Specific Integrated Circuits (ASIC) and Field Programmable Gate Arrays (FPGA) verification is quite a time consuming phase in design flow cycle and it can be done using methodologies such as Universal Verification Methodology (UVM) and formal verification.The UVM methodology is simulation based verification where in the verifier will have to trigger the Design Under Test (DUT) manually by writing sequences which target different features of the DUT and the verification environment can also have verification directives such as assertions to spot design bugs. READ MORE
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5. Implementation of a Deep Learning Inference Accelerator on the FPGA.
University essay from Lunds universitet/Institutionen för elektro- och informationsteknikAbstract : Today, Artificial Intelligence is one of the most important technologies, ubiquitous in our daily lives. Deep Neural Networks (DNN's) have come up as state of art for various machine intelligence applications such as object detection, image classification, face recognition and performs myriad of activities with exceptional prediction accuracy. READ MORE
