Essays about: "virtex"
Showing result 1 - 5 of 28 essays containing the word virtex.
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1. Arbitrary Decimation for High Sample Rates, Algorithm Design and FPGA implementation
University essay from Lunds universitet/Institutionen för elektro- och informationsteknikAbstract : This master thesis investigates how to perform irrational decimation, the process of reducing the sample rate of a signal, for high throughput systems. The thesis work consists both an algorithmic part and an implementation part. READ MORE
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2. Investigation of using a PRET processor on a low-cost, low- power FPGA
University essay from KTH/Skolan för informations- och kommunikationsteknik (ICT)Abstract : Mixed-criticality is a current trend in real-time embedded systems, where software tasks are integrated onto fewer hardware platforms. The basic idea is to use one processor to execute multiple tasks with differing requirements of certification, importance or safety. READ MORE
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3. Hardware Implementation and Assessment of a Soft MIMO Detector Based On SUMIS
University essay from Kommunikationssystem; Tekniska högskolanAbstract : To allow faster and more reliable wireless communication a technique is to use multiple antennas in the transmitter and receiver. This technique is called MIMO. The usage of MIMO adds complexity to the receiver that must determine what the transmitter actually sent. READ MORE
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4. Design and Implementation of a Real-Time FFT-core for Frequency Domain Triggering
University essay from Elektroniksystem; Tekniska högskolanAbstract : To efficiently capture signal events when performing analog measurements, a competent toolbox is required. In this master thesis, a system for frequency domain triggering is designed and implemented. The implemented system provides advanced frequency domain trigger conditions, in order to ease the capture of a desired signal event. READ MORE
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5. FPGA Platform for Debug
University essay from KTH/Skolan för informations- och kommunikationsteknik (ICT)Abstract : FPGA-based prototyping is increasingly used in ASIC developments today to allow hardware/software co-design well ahead of chip fabrication and acceleration of functional verification of ASIC designs and the surrounding system. This thesis addresses an FPGA platform that can be applied in the development of next generation target debugger system. READ MORE