Specification and Visualization of Interconnection Networks of Mobile GPUs

Abstract: The number of components that can be fit into a single chip is increasing over time, because of improved manufacturing technology. An efficient way to con- nect the components is through a packet switched network, a Network on Chip. Such a network can be designed in many different ways. An effective way to explore the large design space is by simulation. In this project, we have devel- oped a network description language to define the network of a mobile GPU. As part of this process, we have surveyed how NoCs are specified in several simulators. We have implemented support for the language in a GPU simula- tor. We have also implemented a script that outputs a visual representation of networks defined in the language. The purpose of the project has been to develop tools to make Network on Chip modeling faster, easier, and less error prone. The result was evaluated qualitatively and quantitatively.