Develop and prototype code generation techniques for a clause-based GPU

Abstract: Processors grow more and more complex, even more so in the field of GPUs, where the instruction set, in general, is not publicly available. This enables them to change more rapidly than CPUs, since backwards compatibility is not an issue. In this thesis multiple approaches are investigated for code generation for a clause-based GPU. An optional pre-scheduler is implemented, together with two approaches for register allocation and one post-scheduler. It is found that a pre-scheduler can lower the register pressure considerably which makes a major impact on register allocation. The differences between the two register allocators is minimal and they can be considered to be equal.