Design and Implementation of a 7-8 GHz Low-Noise Amplifier
The thesis describes the LNA design for the European UWB regulations for 6.0-8.5 GHz. The design of low-noise amplifier is a critical step while designing the front-end of the receiver architecture. This work covers the design and simulation of the LNA using the PHEMT transistor ATF-36163. The thesis includes the bias network design, stability analysis, matching network design and layout design of the LNA RF module with layout simulation. The electronic design automation tool, Advance Design System (ADS) is used. After implementation of LNA on a printed circuit board (PCB), the LNA is measured with the help of the vector network analyzer. The simulated noise figure is 1.096 dB and simulated power gain is 9.01 dB at 7.5 GHz and power gain of simulated layout component is 6.5 dB. The measured power gain is 2.36 dB.
AT THIS PAGE YOU CAN DOWNLOAD THE WHOLE ESSAY. (follow the link to the next page)