Designing a Low Power Regulator for Smart Dust

Abstract: The revolutionary progress that happened recently in the micro-electro mechanicalsystems (MEMS) field and the complementary metal-oxide-semiconductor(CMOS) integrated circuits has made it possible to produce low-cost, low-powerand small size processing circuits. Utilizing wireless communication theory allowsthose circuits to send their data over a network. This wireless sensor network isknown as "Smart Dust". Each wireless sensor node in the network is indicated as "mote". It consistsof several components: sensors, micro-processors, radio transceivers and a powermanagement unit. The power management unit can be divided into several partsincluding battery, power control and regulator. The purpose of the regulator is tosupply a constant reliable voltage to the other parts in the mote as most of thedevices have voltage limits that need to be considered to guarantee producing arobust long-life mote. In this thesis designing a low-power regulator is investigated. The goal of thethesis is to design a regulator that can handle the high-voltage acquired froman energy harvest unit using only 65-nm core transistors. This allows an easierproduction process that results in a low-cost fully-integrated chip. The regulatorarchitecture to be used is a simple linear regulator. The report highlights the theoretical background, the challenges of the analogdesign and presents the results of the simulation that were ran using cadence designsystem software on schematic level.