A comparison of circuit implementations from a security perspective

Abstract: In the late 90's research showed that all circuit implementations were susceptible to power analysis and that this analysis could be used to extract secret information. Further research to counteract this new threat by adding countermeasures or modifying the nderlaying algorithm only seemed to slow down the attack. There were no objective analysis of how different circuit implementations leak information and by what magnitude. This thesis will present such an objective comparison on five different logic styles. The comparison results are based on simulations performed on transistor level and show that it is possible to implement circuits in a more secure and easier way than what has been previously suggested.