High-Speed Serial Link for Low-Power Memories

Abstract: A bidirectional serial link on-chip implementation is going to be assessed so as to set the option of using it as a replacement of the actual parallel interconnection used to transfer data between different memory banks in an embedded low-power memory unit. Asynchronous communication is the protocol selected and current mode pulse signaling is the technique used to transfer data. A 32-bit data packet is transmitted with a throughput of 10.66 Gbps. The interconnect was designed using 28nm CMOS BULK technology from TSMC and was simulated with Cadence Analog Spectre; it occupies 902.21 μm 2 and consumes 4.93 pJ/bit. The research was done in collaboration with the company Xenergic.