Algorithms for Noise Shaping and Interleaving of Digital to Analog Converters
This thesis investigates the possibilities of interleaving multiple Digital to Analog converters in a high speed environment. Algorithms for interleaving and noise shaping as well as filters are tailored for high frequency operation.In the first part of the thesis, algorithms are evaluated and models to simulate errors are created. It was concluded that DAC interleaving is feasible to reach high sample rates. Interleaving or parallelization of the $\Sigma\Delta$ noise shaper proved to not be feasible for the specific application due low oversampling and high speed operation.The second part of the thesis consists of measurements on a custom SP Devices development board. These tests confirm that interleaving of DACs works as intended and that it is possible to increase the output bandwidth beyond the one of a single DAC.
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