Modeling of KTH UTBSOI MOSFET
Abstract: Semiconductor devices such as transistors and integrated circuits are everywhere in our daily lives, it's one of the most important foundations of today's information society. Nanotechnology enables the production of lighter, faster and more efficient components and systems. Manufacturing technology has improved considerably over the past 40 years, but in recent years, the bulk transistors have reaching the limits of Moore’s law as the size shrinking too few tens of nanometers. The main difficulties are to reduce the power consumption, improve the speed meanwhile maintain the low manufacturing cost. This has given an opportunity for some emerging semiconductor technologies. One of the most promising approaches is implementation of new device architectures, such as FinFET and UTBSOI. This bachelor thesis covers the basics of compact modeling of UTBSOI MOSFET, by using the BSIMSOI compact model and SPICE software Cadence to model the KTH Ultra-Thin-Body Silicon-on-Insulator (UTB-SOI) transistor. The result of this paper shows the accuracy of BSIMSOI and can be used for future extraction work.
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