Design and Implementation of a Real-Time FFT-core for Frequency Domain Triggering

Abstract: To efficiently capture signal events when performing analog measurements, a competent toolbox is required. In this master thesis, a system for frequency domain triggering is designed and implemented. The implemented system provides advanced frequency domain trigger conditions, in order to ease the capture of a desired signal event. A real-time 1024-point pipelined feedforward FFT-core is implemented to transform the signal from the time domain to the frequency domain. The system is designed and synthesized for a Virtex-6 FPGA (XC6VLX240T) and is integrated into SP Devices’ digitizer ADQ1600. The implemented system is able to handle a continuous stream of 1.6GS/s at 16-bit. A small software API is developed that provides runtime configuration of the Triggering conditions.