Implementing a SATA disk controller on a Virtex5 FPGA

Abstract: The aim of this master thesis was to develop an SATA disk controller that complies with the Intel AHCI standard. The main operation of the AHCI standard is to make the user capable of interacting with the attached SATA hard disk. Hence the user can write and read sectors in the disk through software. The AHCI controller has been coded in VHDL and tested on a Xilinx ML505 FPGA. To test the behavior of the design, a C program has been coded which puts the user specific commands into the system memory and notifies the user of the responses of the SATA disk. The design is tested with both SATA-1 and SATA-2 standards and is proven to be working with each of these. The controller consists of two different parts which are the front end region and the AMBA AHB region. The front end interfaces the SATA disk to the AMBA domain where the main state machine resides. The operation frequencies of these two domains are also different. The front end operates at 150 MHz, whereas the AMBA domain is functioning at 80 MHz. So, these two domains need clock synchronization to operate mutually. The design has been wrapped into a single core and can be extended with additional features of the AHCI standard that have been left out for the sake of completion of the project.