Essays about: "CMOS Layout designs"

Showing result 1 - 5 of 6 essays containing the words CMOS Layout designs.

  1. 1. Design and Modeling of InxGa(1−x)As/InP based Nanosheet Field Effect Transistors for High Frequency Applications

    University essay from Lunds universitet/Institutionen för elektro- och informationsteknik

    Author : Hanyu Liu; Xi Chen; [2023]
    Keywords : nanosheet NS ; gate-all-around GAA ; channel release; parasitic channel; MATLAB; COMSOL; technology node; Technology and Engineering;

    Abstract : The advancement of CMOS technology has been fueled by the need to satisfy Moore’s law by shrinking transistors to progressively smaller sizes and increasing the transistor density per unit area [1]. The dimension of the state-of-the-art MOSFET is now down to a few nanometers. READ MORE

  3. 2. Design of a Differential Cross-Coupled Power LC Oscillator with ASK Modulation

    University essay from Linköpings universitet/Elektroniska Kretsar och System

    Author : Sanjay Sarker; [2023]
    Keywords : Cross-coupled LC Oscillator; Amplitude Shift Keying ASK Modulator; Spiral Inductor; MIM Capacitor; Current Mirror Switching;

    Abstract : Rapid growth in the field of communications industry has led to newer opportunities and challenges in the design of CMOS based monolithic integrated circuits. ASK modulators are a class of digital modulators which are known for their relative simplicity of implementation for low cost applications in the industrial and biomedical domains. READ MORE

  4. 3. Configurable, scalable single-ended sense amplifier with additional auxiliary blocks for low-power two-port memories in advanced FinFET technologies

    University essay from Lunds universitet/Institutionen för elektro- och informationsteknik

    Author : Limitha Subbaiah Kumar Nangaru; [2022]
    Keywords : CMOS Complementary Metal Oxide Semiconductors ; DRC Design Rule Check ; Process Corners; FinFET Fin Field Effect Transistor ; IC Integrated Circuit ; LVS Layout Versus Schematic ; Monte Carlo; Nominal Voltage; PDK Process Design Kit ; Power Delay Product; Read Bit Line; Read Word Line; SoC System on Chip ; SRAM Static Random Access Memory ; Threshold Voltage; Technology and Engineering;

    Abstract : System on Chip (SoC) designs contain a variety of Intellectual Property (IP) cores, including digital signal processing blocks, media and graphics processing units, as well as processing core units that employ multiple-port memories to enhance performance and bandwidth. These memories allow parallel read/write operations from the same memory blocks from different ports. READ MORE

  5. 4. Suitability of Dynamic Latches for Sub-VT Operation

    University essay from Lunds universitet/Institutionen för elektro- och informationsteknik

    Author : Sina Borhani; [2018]
    Keywords : Low power circuit; Dynamic Latches; Power consumption; Technology and Engineering;

    Abstract : Suitability of Dynamic Latches for Sub-VT Operation Sina Borhani [email protected]. READ MORE

  6. 5. An Energy-efficient 32-bit multiplier architecture in 90nm CMOS

    University essay from Institutionen för systemteknik

    Author : Nasir Mehmood; [2006]
    Keywords : Modified Booth-encoding; carry save adder; multiplier; partial products; CMOS power; VLSI; SOC; Cadence;

    Abstract : A fast and energy-efficient multiplier is always needed in electronics industry especially DSP, image processing and arithmetic units in microprocessors. Multiplier is such an important element which contributes substantially to the total power consumption of the system. READ MORE