Essays about: "digital hardware design"

Showing result 1 - 5 of 135 essays containing the words digital hardware design.

1. 1. ANOMALY DETECTION FOR INDUSTRIAL APPLICATIONS USING COMMODITY HARDWARE

   University essay from Mälardalens universitet/Akademin för innovation, design och teknik

   Author : John Moberg; Jonathan Widén; [2023]
   Keywords : Computer Vision; Anomaly Detection; Single Board Computer; Embedded systems;

   Abstract : As the Automotive industry is heavily regulated from a quality point of view, excellence in pro-duction is obligatory. Due to the fact that removing human error from humans is impossible, new solutions must be found. READ MORE

3. 2. FPGA programming with VHDL : A laboratory for the students in the Switching Theory and Digital Design course

   University essay from Högskolan i Halmstad

   Author : Samaneh Azimi; Safia Abba Ali; [2023]
   Keywords : FPGA Field-Programmable Gate Arrays VHDL Very High-Speed Integrated Circuits HDL Hardware description language LUT Look-up-table CLB Configurable Logic Blocks MUX Multiplexers IOB Input Output Blocks DUT Device under the test ASIC Application-specific integrated circuits SOC System on chips RTL Register Transfer Language;

   Abstract : This thesis aims to create effective and comprehensive learning materials for students enrolled in the Switching Theory and Digital Design course. The lab is designed to enable students to program an FPGA using VHDL in the Quartus programming environment to control traffic intersections with sensors and traffic signals. READ MORE

4. 3. Digital Front End Algorithms for Sub-Band Full Duplex

   University essay from Lunds universitet/Institutionen för elektro- och informationsteknik

   Author : Midhat Rizvi; Khaled Al-Khateeb; [2023]
   Keywords : Adjacent Channel Leakage Ratio; Bit Error Rate; Clipping and Filtering; Crest Factor Reduction; Digital front end; Digital Pre-Distortion Error Vector Magnitude; Frequency Division Duplex; Power Amplifier; Peak to Average Power Ratio; Peak Cancellation Crest Factor Reduction; Sub Band Full Duplex; Self-Interference Cancellation; Signal-to-Interference Noise Ratio; Signal-to-Noise Ratio; Turbo Clipping; Time Division Duplex; Technology and Engineering;

   Abstract : Sub-band full duplex is a new communication scheme technology, where a single frequency band is partitioned into sub-bands for downlink (DL) and up-link(UL) transmissions, and both can take place simultaneously. The idea behind the sub-band full duplex development is to improve the throughput, and coverage and reduce the latency of the UL communication by allowing the UL reception during the DL transmission. READ MORE

5. 4. Integrated Sensing and Communicationusing OFDM and Stepped FMCWSignals : Proof-of-Concept and Evaluation with Software DefinedRadios

   University essay from Blekinge Tekniska Högskola/Fakulteten för datavetenskaper

   Author : Sai Chetan Poluri; Tejaswi Dunuka; [2023]
   Keywords : 5G and 6G Communications; FMCW; GNU Radio; ISAC; OFDM; SDR; Sensing; JSAC;

   Abstract : The thesis work shows the implementation of sensing and communication, so a basic knowledge of analog and digital communication systems is needed to understand this paper Background. With the increase in smart devices, the bandwidth requirements are increased, which created congestion in the radio spectrum resources. READ MORE

6. 5. Novel Method of ASIC interface IP development using HLS

   University essay from Lunds universitet/Institutionen för elektro- och informationsteknik

   Author : Anestis Athanasiadis; Chandranshu Mishra; [2023]
   Keywords : High Level Synthesis; HLS; Untimed C ; Control logic; I3C; clock-accurate design; IP development; Technology and Engineering;

   Abstract : High-Level Synthesis(HLS) is a design methodology that enables designers to implement hardware from high-level coding languages, such as C, C++, or System C. It provides designers with the ability to convey their design at a higher level of abstraction, which allows more emphasis on an algorithm and functional aspects of design instead on low-level hardware details. READ MORE