Essays about: "high-speed sampling"
Showing result 1 - 5 of 23 essays containing the words high-speed sampling.
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1. Control system framework for robots based on real-time application. : A proposed framework and dynamic sampling rate algorithm (DSRA) application in a robotic system for efficient data collection.
University essay from Linnéuniversitetet/Sjöfartshögskolan (SJÖ)Abstract : Industry 4.0 is associated with the technological complexity of designing frameworks for factory automation. In that case, since the robots are used in factory operations, this paper proposes a framework that can be used for (near) real-time applications (RTA) in the robotic system. READ MORE
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2. Power Estimation Tool for Digital Front-End 5G Radio ASIC
University essay from Blekinge Tekniska Högskola/Institutionen för datavetenskapAbstract : Application Specific Integrated Circuits (ASICs) are critical to delivering on 5G’s promises of high speed, low latency, and expanded capacity. Digital Front-End (DFE) ASICs are particularly important components because they enhance crucial signal processing activities. READ MORE
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3. Traction Adaptive Motion Planning for Autonomous Racing
University essay from KTH/Skolan för industriell teknik och management (ITM)Abstract : Autonomous driving technology is continuously evolving at an accelerated pace. The road environment is always uncertain, which requires an evasive manoeuvre that an autonomous vehicle can take. READ MORE
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4. Fragmentation in graupel snow collisions
University essay from Lunds universitet/Institutionen för naturgeografi och ekosystemvetenskapAbstract : Aircraft observations of precipitating clouds with cloud top temperatures higher than -38°C have revealed that Secondary Ice Production (SIP) is responsible for presence of majority of ice particles. One such SIP mechanism is fragmentation via collisions between ice particles. READ MORE
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5. A design of a 100 MS/s, 8-bit Pipelined ADC in CMOS
University essay from Lunds universitet/Institutionen för elektro- och informationsteknikAbstract : The thesis focuses on designing and simulating an 8-bit high-speed fully differential pipelined Analog to Digital Converter (ADC) in the 65nm Complementary Metal-Oxide-Semiconductor (CMOS) technology by using the software Cadence Virtuoso. The aim is to increase the operation speed of the ADC for communication systems without reducing the performance, in the meantime, the low power consumption and the low complexity should also be required when considering future implementation. READ MORE