Evaluation of cache memory configurations with performance monitoring in embedded real-time automotive systems : Determining performance characteristics of cache memory with hardware counters and software profiling.

Abstract: Modern day automotive systems are highly dependent on real-time software control to manage the powertrain and high-level features, such as cruise control. The computational power available has increased tremendously from decades of microcontroller and hardware development on such platforms. In contrast, the access times to the memory are still substantial, creating a significant bottleneck in the system. Therefore, small cache memories are used to reduce access times and improve performance. With significantly smaller but faster memory, the configuration and behaviour of the cache play an important role and are also highly dependent on the platform. Several of the configurations have an impact on the platform behaviour not only in terms of execution time, but also in multithreaded coherency, robustness, security, and internal bus usage. To distinguish performance differences and cache behaviour between configurations, hardware counters and low-level processor events such as bus usage, line fills, reads, and writes are monitored in conjunction with task load profiling. This proves to be an effective measurement method for use in a real-time embedded automotive system to provide both average and worstcase scenarios. In addition, the collected results are used to suggest improvements to the configuration of the platform used for measurements. For example, no major performance benefits were measured from excluding certain parts of the memory to increase hit rate. Less robust write-policies copy-back proved to be more efficient and could be used in combination with error correction to increase security. Memory coherency in multithreaded execution also proved to be inefficient and a major source to increased miss-rate due to snooping.