LNoC, Lagom Network On Chip - A thesis about network on chip and the design of a specification of a network on chip optimized for FPGAs called LNoC.

Abstract: This thesis presents a new network on chip (NoC) designed specifically to suit the growing FPGA market. Network on chip is the interconnect of tomorrow, as of writing this, traditional computer buses are still the most used type of interconnect technology. At the same time research on NoC has been extensive over the last couple of years and is today used in some of the newest and most capable CPUs from leading companies like Intel, Texas Instruments and IBM. As more cores need to t cut it anymore, a network for interconnect communication is the solution. FPGAs are today produced at 22 and 28 nm and are capable of holding very complex logic designs with many cores. Low end FPGAs are also falling in price and it opens up the usage of FPGAs in markets where they earlier could not be used because of their high price. LNoC is a network on chip designed to suit the need of both high performance systems and low cost FPGA designs. The key to LNoCs success s reconfigurability and ability to adapt to the demands of each unique FPGA design, while keeping a standard interface for IP blocks enabling effective hardware reusability. The presentation of this thesis work contains two main parts, the content of the thesis and the LNoC specification. The thesis chapters focus on the background and development of LNoC. Some example use cases are also discussed. It explains some concepts and technologies that the reader might not be familiar with. The specification contains an in depth description of LNoC and how it should be implemented in hardware