Essays about: "sampling clock generator"

Found 4 essays containing the words sampling clock generator.

  1. 1. Implementing and Testing Self-Timed Rings on a FPGA as Entropy Sources

    University essay from Linköpings universitet/Informationskodning; Linköpings universitet/Tekniska fakulteten

    Author : Marcus Einar; [2015]
    Keywords : Self-Timed Rings; FPGA; Field Programmable Gate Array; Entropy Generation;

    Abstract : Random number generators are basic building blocks of modern cryptographic systems. Usually pseudo random number generators, carefully constructed deter- ministic algorithms that generate seemingly random numbers, are used. READ MORE

  3. 2. Direct Digital Pulse Width Modulation for Class D Amplifiers

    University essay from Institutionen för systemteknik

    Author : Stefan Stark; [2007]
    Keywords : PWM; Class-D; delay-line; direct digital modulation; delay element;

    Abstract : Class D amplifiers are becoming increasingly popular in audio devices. The strongest reason is the high efficiency which makes it advantageous for portable battery-driven products. Infineon Technologies is developing products in this area, and has recently filed a patent application regarding an implementation of a part of the class D amplifier. READ MORE

  4. 3. High Speed On-Chip Measurment Circuit

    University essay from Institutionen för systemteknik

    Author : Arvid Stridfelt; [2005]
    Keywords : Electronics; CMOS; 0.13; sampling; periodic sampling; digital oscilloscope; time equivalent sampling; track and hold; master and slave; sampling clock generator; voltagedivider; source follower; sampling switch; transmission gate; RLC-line; Elektronik;

    Abstract : This master thesis describes a design exploration of a circuit capable of measuring high speed signals without adding significant capacitive load to the measuring node. It is designed in a 0.13 CMOS process with a supply voltage of 1.2 Volt. READ MORE

  5. 4. Design of a Low Power, High Performance Track-and-Hold Circuit in a 0.18µm CMOS Technology

    University essay from Institutionen för systemteknik

    Author : Erik Säll; [2002]
    Keywords : Electronics; track-and-hold; CMOS; 0.18; low power; high performance; 10-bit; folded cascode; switch theory; correlated double sampling; CDS; fully differential; gain boosting; regulated cascode; transmission gate; transmission gate switch; clock generator; clock driver; bias; bias circuit; amplifier design; switch design; common mode feedback; CMFB; 80MSPS; 80MS s; Elektronik;

    Abstract : This master thesis describes the design of a track-and-hold (T&H) circuit with 10bit resolution, 80MS/s and 30MHz bandwidth. It is designed in a 0.18µm CMOS process with a supply voltage of 1.8 Volt. READ MORE