Test and Repair of Reconfigurable On-chip Instrument Access Networks

Abstract: As transistors in integrated circuits (ICs) are becoming smaller, faster and more, it has become harder to avoid malfunctioning. Embedded instruments are increasingly used to test, tune, and configure the transistors in ICs. IEEE Std.1149.1-2013 and IEEE Std.1687 standardize the access to these embedded instruments. IEEE Std.1687 enables reconfigurable scan networks which allow only desirable instruments to be included in the active scan-path. Reconfigurable scan networks can become faulty, which may lead to the situation there will be no possibility left to test, trim and configure the IC. In this thesis, we focused on the test and repair of the faulty scan registers. We have introduced two solutions, based on the hardware and software, to test the reconfigurable scan network, to identify faulty scan registers, and repair the network by excluding the faulty scan register from the network. We did two experiments to measure the overhead in terms of area and data. Here, the data overhead is the data needed to be sent to IC for testing and repairing the reconfigurable network. From these experiments, we found both the solutions have unique advantages. The software solution does not use hardware area, while the hardware solution results in low data overhead.